lec17Test - Introduction to CMOS VLSI Design Test Outline...

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Introduction to CMOS VLSI Design Test
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Test Slide 2 CMOS VLSI Design Outline Testing Logic Verification Silicon Debug Manufacturing Test Fault Models Observability and Controllability Design for Test Scan BIST Boundary Scan
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Test Slide 3 CMOS VLSI Design Testing Testing is one of the most expensive parts of chips Logic verification accounts for > 50% of design effort for many chips Debug time after fabrication has enormous opportunity cost Shipping defective parts can sink a company Example: Intel FDIV bug Logic error not caught until > 1M units shipped Recall cost $450M (!!!)
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Test Slide 4 CMOS VLSI Design Logic Verification Does the chip simulate correctly? Usually done at HDL level Verification engineers write test bench for HDL Can’t test all cases Look for corner cases Try to break logic design Ex: 32-bit adder Test all combinations of corner cases as inputs: 0, 1, 2, 2 31 -1, -1, -2 31 , a few random numbers Good tests require ingenuity
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Test Slide 5 CMOS VLSI Design Silicon Debug Test the first chips back from fabrication If you are lucky, they work the first time If not… Logic bugs vs. electrical failures Most chip failures are logic bugs from inadequate simulation Some are electrical failures Crosstalk Dynamic nodes: leakage, charge sharing Ratio failures A few are tool or methodology failures (e.g. DRC) Fix the bugs and fabricate a corrected chip
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Test Slide 6 CMOS VLSI Design Shmoo Plots How to diagnose failures? Hard to access chips Picoprobes Electron beam Laser voltage probing Built-in self-test Shmoo plots Vary voltage, frequency Look for cause of electrical failures
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Test Slide 7 CMOS VLSI Design Shmoo Plots How to diagnose failures? Hard to access chips Picoprobes Electron beam Laser voltage probing Built-in self-test Shmoo plots Vary voltage, frequency Look for cause of electrical failures
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Test Slide 8 CMOS VLSI Design Manufacturing Test A speck of dust on a wafer is sufficient to kill chip Yield of any chip is < 100% Must test chips after manufacturing before delivery to customers to only ship good parts Manufacturing testers are very expensive Minimize time on tester Careful selection of test vectors
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Test Slide 9 CMOS VLSI Design Cheap Testers If you don’t have a multimillion dollar tester: Build a breadboard with LED’s and switches Hook up a logic analyzer and pattern generator Or use a low-cost functional chip tester
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This note was uploaded on 10/13/2009 for the course ECE 482 taught by Professor Adnanaziz during the Spring '07 term at University of Texas at Austin.

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lec17Test - Introduction to CMOS VLSI Design Test Outline...

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