nowka-low-power-07 - EE-382M VLSIII Circuits Design for Low...

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The University of Texas at Austin EE382M VLSI-II Class Notes Foil # 1 Circuits Design for Low Power Kevin Nowka, IBM Austin Research Laboratory EE-382M VLSI–II
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The University of Texas at Austin EE382M VLSI-II Class Notes Foil # 2 Agenda Overview of VLSI power Technology, Scaling, and Power Review of scaling A look at the real trends and projections for the future Active power – components, trends, managing, estimating Static power – components, trends, managing, estimating Summary
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The University of Texas at Austin EE382M VLSI-II Class Notes Foil # 3 A quick look at the power consumption of a modern Laptop (IBM R40) Src: Mahesri et al., U of Illinois, 2004 0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100% CPU Workload 26W FTP Tx 17W 3D Games 30W Other LCD+BckLt Wireless Mem Graphics NB/SB; misc CPU Power is all about the (digital) VLSI circuits…. .and the backlight!
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The University of Texas at Austin EE382M VLSI-II Class Notes Foil # 4 A quick look at the power consumption of a Server Source Bose, Hot Chips 2005, cpu pwr mem i/o Again, it’s a VLSI problem – but this time with analog!
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The University of Texas at Austin EE382M VLSI-II Class Notes Foil # 5 Designing within limits: power & energy Thermal limits (for most parts self-heating is a substantial thermal issue) - package cost (4-5W limit for cheap plastic package, 50-100W/sq-cm air cooled limit, 5k-7.5kW 19” rack) - Device reliability (junction temp > 125C quickly reduces reliability) - Performance (25C -> 105C loss of 30% of performance) - Distribution limits - Substantial portion of wiring resource, area for power dist. - Higher current => lower R, greater dI/dt => more wire, decap - Package capable of low impedance distribution - Energy capacity limits - AA battery ~1000mA.hr => limits power, function, or lifetime - Energy cost - Energy for IT equipment large fraction of total cost of ownership
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The University of Texas at Austin EE382M VLSI-II Class Notes Foil # 6 A genda Overview of VLSI power Technology, Scaling, and Power Review of scaling A look at the real trends and projections for the future Active power – components, trends, managing, estimating Static power – components, trends, managing, estimating Summary
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The University of Texas at Austin EE382M VLSI-II Class Notes Foil # 7 CMOS circuit power consumption components P = ½ C sw V dd V f + I st V dd + I static V dd Dynamic power consumption ( ½ C sw V dd V f + I st V dd ) Load switching (including parasitic & interconnect) Glitching Shoot through power (I st V dd ) Static power consumption (I static V dd ) Current sources – bias currents Current dependent logic -- NMOS, pseudo-NMOS, CML Junction currents Subthreshold MOS currents Gate tunneling
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The University of Texas at Austin EE382M VLSI-II Class Notes Foil # 8 Review of Constant Field Scaling Parameter Value Scaled Value Dimensions L, W, Tox α L, α W, α Tox Dopant concentrations Na, Nd Na/ α , Nd/ α Voltage V α V Field Ε Ε Capacitance C α C Current I α I Propagation time (~CV/I) t α t Power (VI) P α 2 P Density d d/ α 2 These are distributions… how do the σ s scale?
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nowka-low-power-07 - EE-382M VLSIII Circuits Design for Low...

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