lec20Packaging - Introduction to CMOS VLSI Design Package,...

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Introduction to CMOS VLSI Design Package, Power, and I/O
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Packaging, Power, and I/O Slide 2 CMOS VLSI Design Outline Packaging Power Distribution I/O Synchronization
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Packaging, Power, and I/O Slide 3 CMOS VLSI Design Packages Package functions Electrical connection of signals and power from chip to board Little delay or distortion Mechanical connection of chip to board Removes heat produced on chip Protects chip from mechanical damage Compatible with thermal expansion Inexpensive to manufacture and test
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Packaging, Power, and I/O Slide 4 CMOS VLSI Design Package Types Through-hole vs. surface mount
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Packaging, Power, and I/O Slide 5 CMOS VLSI Design Multichip Modules Pentium Pro MCM Fast connection of CPU to cache Expensive, requires known good dice
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Packaging, Power, and I/O Slide 6 CMOS VLSI Design Chip-to-Package Bonding Traditionally, chip is surrounded by pad frame Metal pads on 100 – 200 μ m pitch Gold bond wires attach pads to package Lead frame distributes signals in package Metal heat spreader helps with cooling
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Packaging, Power, and I/O Slide 7 CMOS VLSI Design Advanced Packages Bond wires contribute parasitic inductance Fancy packages have many signal, power layers Like tiny printed circuit boards Flip-chip places connections across surface of die rather than around periphery Top level metal pads covered with solder balls Chip flips upside down Carefully aligned to package (done blind!) Heated to melt balls Also called C4 (Controlled Collapse Chip Connection)
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Packaging, Power, and I/O Slide 8 CMOS VLSI Design Package Parasitics Chip Signal Pins Package Capacitor Signal Pads Chip V DD Chip GND Board V DD Board GND Bond Wire Lead Frame Package Use many V DD , GND in parallel – Inductance, I DD
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This note was uploaded on 10/13/2009 for the course ECE 482 taught by Professor Adnanaziz during the Spring '07 term at University of Texas.

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lec20Packaging - Introduction to CMOS VLSI Design Package,...

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