12-add - 9/28/09 ECE2030 Introduction to Computer...

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9/28/09 1 1 ECE2030 Introduction to Computer Engineering Lecture 11: Building Blocks for Combinational Logic - Adders/ Subtractors 2 Functional Block: Half-Adder A 2-input, 1-bit width binary adder that performs the following computations: A half adder adds two bits to produce a two-bit sum The sum is expressed as a sum bit , S and a carry bit , C The half adder can be specified as a truth table for S and C X 0 0 1 1 + Y + 0 + 1 + 0 + 1 C S 0 0 0 1 0 1 1 0 X Y C S 0 0 0 0 0 1 0 1 1 0 0 1 1 1 1 0 3 Logic Simplification: Half-Adder The K-Map for S, C is: A pretty trivial map! By inspection: and These equations lead to several implementations. Y X 0 1 3 2 1 1 S Y X 0 1 3 2 1 C ) Y X ( ) Y X ( S Y X Y X Y X S + + = = + = ) ( C Y X C ) Y X ( = = X Y S(um) C(arry) 0 0 0 0 0 1 1 0 1 0 1 0 1 1 0 1 4 Five Implementations: Half-Adder We can derive following sets of equations for a half -adder: (a), (b), and (e) are SOP, POS, and XOR implementations for S. In (c), the C function is used as a term in the AND -NOR implementation of S, and in (d), the function is used in a POS term for S. Y X C ) ( S ) c ( Y X C ) Y X ( ) Y X ( S ) b ( Y X C Y X Y X S ) a ( Y X C = = = + + = = + = + Y X C Y X S ) e ( ) Y X ( C C ) Y X ( S ) d ( = = + = + = C
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9/28/09 2 5 Implementations: Half-Adder The most common half adder implementation is: (e) A NAND only implementation is: ) ( C C ) Y X ( S ) Y X ( = + = X Y C S X Y C S S = X Y + XY = X Y
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12-add - 9/28/09 ECE2030 Introduction to Computer...

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