hw6 - ingly SIR and SOR at the rightmost bit(lsb(Hint you...

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ECE 2030 Introduction to Computer Engineering Homework 6 Not collected 1. Convert x= -53.875 to IEEE 754 SP FP. Represent the result in Hex notation. 2. Convert y = 23.625 to IEEE 754 SP FP. Represent the result in Hex notation. 3. Using only unsigned subtraction, demonstrate that x > y . 4. Design a 1 bit module that can be used to build an n-bit register that can shift left, shift right, parallel load, or hold it’s previous value. Use a positive edge triggered D FF, and any other gates or modules that you need. Show how to use your module to build a 3-bit register. La- bel the shift in and out signals at the (left) msb SIL and SOL respectively, and correspond-
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Unformatted text preview: ingly SIR and SOR at the rightmost bit (lsb). (Hint: you need a 2-bit control signal) 5. Construct a timing diagram for the shift register designed above. Set the control signals to parallel load the value ‘101’ in cycle 1, and then shift left for three subsequent cycles. Input SIR should be set to ‘0’ for all cycles. Show the values for all three bits of the shift register, and the value of SOL for all four cycles. Spring 2009 Due: 24.2.2009 Prof. David Schimmel Section F...
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This note was uploaded on 10/20/2009 for the course COE 1 taught by Professor Many during the Spring '09 term at Georgia Tech.

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