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samplequiz2

# samplequiz2 - 3 A 4-bit adder subtracter(A±B as designed...

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ECE 2030 Introduction to Computer Engineering Sample Quiz 2 1. (25) Design a 2-4 decoder with enable (EN) using NOR gates with any number of inputs. Assume that all inputs (EN, I 1 , and I 0 ) and outputs (Y 3 ,Y 2 ,Y 1 , and Y 0 ) are active high. 2. Design a 3-2 dual-priority encoder. This module has two priority schemes depending on the value of an input signal DIR. When DIR = 0, the priority order is {0,1,2}. When DIR = 1, the priority order is {2,1,0}. Derive a truth table for this module, and give a minimized boolean expression for each necessary output.
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Unformatted text preview: 3. A 4-bit adder subtracter (A±B) as designed in class is presented the operands A=1001 and B=0011. The signal a / s = 1 . What calculations are performed assuming A and B are (i) un-signed and (ii) signed. What are the results in each case, and how do you know? 4. A temperature measurement module yields the following temperature stored in IEEE single precision Foating point format: 0x42948000. What value is encoded. 5. Design a 16x1 multiplexor from 4x1 multiplexors....
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• Spring '09
• many
• priority order, input signal DIR, 3-2 dual-priority encoder, measurement module yields, 4-bit adder subtracter

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