hw07sol - ECE 315 Homework 7 Solution Spring 2009 1(Simple...

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ECE 315 Homework 7 Solution Spring 2009 1. (Simple CS amplifier design) An NMOS amplifier is to be designed to provide an output voltage centered at 1.5V with 0.5V peak-to-peak variation across a R D =50k load in the circuit below. (a) If a small-signal gain of 5V/V is needed, what g m is required if r o of the NMOSFET can be ignored? (2 pts) If we ignore r o of the NMOS, then the small signal A V is –g m R D for the CS amplifier. We will not deal with the negative sign here explicitly, since in small-signal circuits that is just a constant phase shift. Therefore g m = 5/50k = 0.10mS. (b) For V DD =3V, what values of I D and V OV will you choose for the output center point? (4 pts) The center point has the output at 1.5V, and therefore the current will be (3.0 – 1.5)/50k = 0.030mA. For the given gm in (a), we will need a V OV of 0.6V. (c) What W/L ratio is required if k n = μ n C ox = 0.1mA/V 2 ? (2 pts) For the large-signal current in saturation ignoring the Early effect, we have 2 ' 2 1 OV n D V k L W I = , which gives 1.67 or (W/L) = 5/3. Additional info: The W/L is often given in scalable numbers in technology whose minimal definable dimension is 2 λ . This 2 λ is called the gate pitch, which is the naming convention of the technology, i.e., 65nm CMOS technology means the distance between two closely packed gate is 65nm (see below). In digital circuits, we usually work with L =2 λ , and a wide transistor denoted as 200 λ /2 λ or simply 200/2. In analog circuits, due to the concerns of a larger V A , we often have the minimal transistor length at 3 λ . The answer 5/3 above is a typical minimal-sized transistor in analog circuits (while in digital circuits it will be 3/2). For some analog design to generate a small voltage or current in current mirrors or steering, devices of 3/1,000 are not strange either. To drive an external circuis, a very strong transistor of 10,000/2 is not uncommon. Notice that for a square layout design, even for 10,000/2 W/L , the foot print can still be smaller than 100 μ m by 100 μ m in 0.35 μ m technology. (d) If V th =0.8V, what is the large-signal V GS and V DS as the Q point? (2 pts) V OV =0.6V, therefore, V GS = 1.4V. V DS is at 1.5V as previously presented. This is the Q point. 2 λ 1
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(e) For v O to swing between 1.25V and 1.75V, what is the corresponding v gs swing? (2 pts) Check if the transistor is always in saturation. (2 pts) We have a gain of 5 at the Q point, so the v gs has a swing of 0.1V. The large-signal V GS is from 1.35V to 1.45V. V DS at 1.25V and 1.75V is always larger than the gate overdrive in this range, and hence the transistor is always in saturation. The careful student can check if the small-signal calculation corresponds well with the large-signal calculation. At the large-signal V GS =1.35V, I D =0.025mA, and v O = 3.0 – 50k Ω× 0.0252 = 1.74V. At V GS =1.45V, I D = 0.0352mA and v O = 3.0– 50k Ω× 0.0352 = 1.24V. This is VERY close to the expected values.
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