# hw09sol - ECE 3150 Homework 9 Solution Fall 2009 1. (Design...

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ECE 3150 Homework 9 Solution Fall 2009 1. (Design of cascode differential amplifier) (a) Sketch the circuit diagram of an active-load MOS differential amplifier where the input transistors are cascoded, and a cascode current mirror is used for the active load. (8 pts) (b) If all of your NMOS transistors are operated at an overdrive voltage of V OV and all NMOS and PMOS transistors have the same early voltage of | V A |, derive the gain expression as: A d = 2(V A / V OV ) 2 . Evaluate the gain for V OV =0.25V and V A =20V. (8 pts) We found in the last homework the expression for a differential amplifier with active load using the small signal model. We can apply the same results here noting now that the output resistance is the parallel combination of the pMOS and nMOS cascode stacks. The transconductance G M will be the same transconductance of a cascode amplifier, which is just g m,n G M = g m,n = OV D V I 2 g m,p = g m,n = g m R o = [(2r o,p + g m,p r o,p 2 ) || (2r o,n + g m,n r o,n 2 )] ≈ D OV A D A OV D o m I V V I V V I r g 2 2 2 2 2 2 = = (since g m r o >> 1) A d =G M R o = 2 2 2 OV A V V . v in + v in - V C V bias V DD v out + v out - 1

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At V OV =0.25V and V A =20V, A d = 12,800. This is a large value even BJT hard to match, but you do need a large V DD in order to make the five-transistor stack saturated. For sure whenever you work with a high-gain system, everything else has to be precise to avoid gain saturation. 2. (BJT and MOS circuit expo) To compare the CMOS and BJT versions of circuits, draw the circuit schematics in both styles with their corresponding active loads. The main small-signal gain transistor needs to be in both types of transistors, i.e., in NMOS/PMOS and then in NPN/PNP. Each question should contain 4 circuits. This is not a difficult exercise, just a lot of circuit drawing. (a) A gain stage with large input and output resistance. (8 pts) This will be a CS amplifier with the active loads. We can use NMOS, PMOS, NPN and PNP with their corresponding loads as below. You can readily observe the similarity between MOS and BJT circuit topologies, and once you are familiar with one, the other should be reasonable to construct also. (b)
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## This note was uploaded on 10/25/2009 for the course ECE 3150 taught by Professor Spencer during the Spring '07 term at Cornell University (Engineering School).

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hw09sol - ECE 3150 Homework 9 Solution Fall 2009 1. (Design...

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