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lecture_note7 - CpE 390: Microprocessor Systems Lecture 7...

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Stevens Institute of Technology 1 CpE 390: Microprocessor Systems Lecture 7 Parallel Ports
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Stevens Institute of Technology 2 Basic Concepts of I/O I/O devices (peripheral devices) are pieces of equipment that an embedded system used to exchange data with the external world The speed and electrical characteristics of I/O devices are different from CPU, therefore, it is impossible to connect them directly to CPU I/O devices are usually attached to the data bus via interface chips
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Stevens Institute of Technology 3 Interface Chips It consists of control registers, status registers, data direction latches, data registers, and control circuitry. It has data pins that are connected to the CPU and I/O port pins that are connected to the I/O devices. Each interface chip has a chip enable signal input or inputs which, when asserted, allow the interface chip to react to the data transfer request. Data transfer between an I/O device and the interface chip can be proceeded bit-by-bit (serial) or in multiple bits (parallel).
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Stevens Institute of Technology 4 Interface Chip In input operation, the input device places data in the data register on the IC, which holds data until they are read by the processor In output operation, the processor writes data into the data register on the IC, and the data register holds them until they are fetched by the output device Address decoder makes sure that each time one and only one peripheral device respond to the CPU’s I/O request. Address Decoder Microprocessor Data Bus Interface chip 1 from input device to output I/O pins Figure 7.1 Interface chip, I/O devices, and microprocessor CE
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Stevens Institute of Technology 5 I/O Schemes Isolated I/O scheme Dedicated instructions for I/O operations. A separate address space for I/O devices. Example: Intel x86 Advantages: Not as susceptible to software errors as the memory mapped I/O because different instructions are used to access memory and I/O devices I/O devices do not occupy the limited memory space The I/O address decoder can be smaller because the I/O address space is much smaller Disadvantages: inflexible I/O instructions inflexible I/O addressing modes
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Stevens Institute of Technology 6 I/O Schemes Memory-mapped I/O scheme - Use the same instruction set to perform memory accesses and I/O operations. - The I/O devices and memory components are resident in the same memory space. - Example: 68hc12 Advantages: - All instructions and addressing modes are available for I/O operations, so I/O programming is very flexible Disadvantages: - More susceptible to software errors - A smaller memory space is available for main memory
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Stevens Institute of Technology 7 Speed difference between CPU & I/O Problem: I/O devices are typically slower than the CPU and may require many cycles to complete an operation If the CPU is performing multiple operations on a single device, then it must wait for one operation to complete before starting the next one Example 1: CPU writes several characters to an output device Example 2: Keyboard interface Solution ?
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This note was uploaded on 10/27/2009 for the course ECE 5 taught by Professor Chavez during the Spring '09 term at Stevens.

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lecture_note7 - CpE 390: Microprocessor Systems Lecture 7...

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