lecture_note13

lecture_note13 - Stevens Institute of Technology 1 CpE 390:...

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Unformatted text preview: Stevens Institute of Technology 1 CpE 390: Microprocessor Systems Lecture 13 ARM Processor Stevens Institute of Technology 2 Operation of Microprocessor Components: use MC68HC12 as an example Basic cycle of CPU is to fetch the 1 st instruction from memory, decode it to determine its type and operand, execute it and then fetch, decode, and execute subsequent instructions. In this way, programs can carry out. Each CPU has a specific set of instructions that it can execute, thus a Pentium cannot execute SPARC programs and a SPARC cannot execute Pentium programs Instruction set of 68HC12 microprocessor Assembly language programming: machine specific I/O programming, subroutine programming, configure operation mode, SPI, SCI, ADC module, program interrupt priorities, etc. Stevens Institute of Technology 3 Operation of Microprocessor Components: use MC68HC12 as an example Hardware interfacing RS232 standard asynchronous communication link Simply I/O devices keyboard, LEDs Applications in embedded systems Measure room temperature and display it. Example 10.7. Stevens Institute of Technology 4 Instruction Set Complexity: CISC vs. RISC The art of processor design is to define an instruction set that supports the functions that are useful to the programmer while allowing an implementation that is as efficient as possible The semantic gap between a high-level language and a machine instruction is bridged by a compiler. So what sort of instruction set makes a good compiler target? Primary objective of processor designers is to improve performance. Performance is defined as the amount of work that the processor can do in a given period of time. Stevens Institute of Technology 5 Instruction Set Complexity: CISC vs. RISC To improve performance, two options Have the processor execute instructions in less time -> RISC Make each instruction do more work -> CISC RISC (reduced instruction set computer) Uses small, highly-optimized set of instructions to do less work with each instruction but execute them much faster CISC (complex instruction set computer) Uses a large number of complicated and powerful instructions to do more work with each one Stevens Institute of Technology 6 Instruction Set Complexity: CISC vs. RISC Prior to 1980, the principle trend was towards increasing complexity in an attempt to reduce the semantic gap. Each performing a complex sequence of operations over many clock cycles Processor was sold on the sophistication and number of addressing modes Processor was controlled by microcode ROMs (faster than main memory), so it make sense to implement frequently used operation as microcode sequences Microcode is the lowest-level instructions that directly control a microprocessor. A single machine-language instruction typically translates into several microcode instructions Stevens Institute of Technology 7 Instruction Set Complexity: CISC vs. RISCInstruction Set Complexity: CISC vs....
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lecture_note13 - Stevens Institute of Technology 1 CpE 390:...

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