{[ promptMessage ]}

Bookmark it

{[ promptMessage ]}

Major Exam 2_EET-022

# Major Exam 2_EET-022 - KING FAHD UNIVERSITY OF PETROLEUM...

This preview shows pages 1–5. Sign up to view the full content.

KING FAHD UNIVERSITY OF PETROLEUM AND MINERALS University Diploma Programs EET 022: Digital Electronic Circuits Major Examination # 2 Tuesday, December 31, 2002 Student Name: ID #: Question No. Points Score 1. 5.0 2. 5.0 3. 10.0 4. 5.0 5. 10.0 6. 10.0 7. 10.0 8. 10.0 9. 10.0 10. 10.0 11. 5.0 12. 10.0 Total 100

This preview has intentionally blurred sections. Sign up to view the full version.

View Full Document
Q.1 For the gated S-R latch, determine the Q and Q outputs for the inputs in the following timing diagram. Show them in proper relation to the enable input. Assume Q starts LOW. (Page 2 of 13)
Q.2 For a negative edge-triggered J-K flip-flop with the inputs in the following timing diagram, develop the Q output waveform relative to the clock. Assume that Q is initially LOW. (Page 3 of 13)

This preview has intentionally blurred sections. Sign up to view the full version.

View Full Document
Q.3 Solve the following questions. a. The data sheet of a certain flip-flop specifies that the minimum HIGH time for the clock pulse is 35 ns and the minimum LOW time is 45 ns. What is the maximum operating frequency? b. The direct current required by a particular flip-flop that operates on a +5 V dc source is found to be 10 mA. A certain digital device uses 20 of these flip-flops. Determine the current capacity required for the +5 V dc supply and the total power dissipation of the system.
This is the end of the preview. Sign up to access the rest of the document.

{[ snackBarMessage ]}

### Page1 / 13

Major Exam 2_EET-022 - KING FAHD UNIVERSITY OF PETROLEUM...

This preview shows document pages 1 - 5. Sign up to view the full document.

View Full Document
Ask a homework question - tutors are online