20065eeM16_2_M16_1_hw2sol

# 20065eeM16_2_M16_1_hw2sol - EE M16 Homework#2 Exercise 4.4...

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EE M16 Homework #2 Exercise 4.4 For the following tabular description of a network, give its graphical description and determine whether the network is valid. If not valid, make the modifications in the description so that it is valid. From To R S A A 2 T X Z Y B D E A 1 A 2 B 1 C 1 C 2 C 3 D 1 D 2 E 1 E 2 Z Solution: Exercise 4.8 Show that the set {XNOR, OR} is universal. You can use the constant 0 or 1 (only one of them). Solution: XNOR = x1’x0’+x1x0 Let x0=0, XNOR = x1’=NOT(x1) Gate Type Input Output A B C D E And2 Not And3 Or2 Or2 A 1 A 2 B 1 C 1 C 2 C 3 D 1 D 2 E 1 E 2 A B C D E

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Exercise 4.13 Analyze the following network shown in Fig 4.24 (textbook). Obtain: a) Switching expressions for each of the outputs. b) A high-level description assuming that bit-vector z=(z2, z1, z0) represents an integer in the radix-2 representation. c) For the gate characteristics given in Table 4.1 (Textbook), determine: The load factor of each input; and The maximum delay of the network (consider the input-output pair that produces the
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20065eeM16_2_M16_1_hw2sol - EE M16 Homework#2 Exercise 4.4...

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