Sheet1
ECE337 Fall 2009 Calendar
Week
Week of
Lecture topics
Lecture notes
Reading
Lab topic
Lab discussion
Homework, Quiz
1
08/24/09
(Tue/Thu)
VHDL intro,
combinational logic, Coding
styles
Mod. 0 all.
Mod 1 pages 1-54
Rushton:
Ch. 1 all (very short)
Ch. 3 all except sec 3.4
(study in detail)
Ch. 4 sec 1-8, 10 (skim)
Lab 1
. Design flow
& design software
intro.
ASIC Design Flow,
Review material for
lab 1 and prelab 2,
lab overview, other
course business
In class exercises (in
lecture notes) AND
assignment to be
posted in Blackboard.
2
08/31/09
(Tue/Thu)
Latches/flip-
flops, Concurrent
processes, Debugging, test
benches,
Mod 1 pages 55-71
Mod 3 pages 1-19, 44-51
Ch. 5 sec 1-5, 7 (skim)
Ch. 8 all (study in detail)
Ch. 9 sec 1-6, 8-10
(study in detail)
Lab 2.
Combinational logic
design using variety
of VHDL styles.
Explain the
synthesis script
being used. Do
modelsim
debugging demo..
Expect short quiz over
reading & lecture
material from 1st week
3
09/07/09
(Tue/Thu)
State Machines,
Controllers
Mod 1 pages 72-118
Mod 3 pages 20-43
Ch. 12 sec 2-3
Ch. 13 sec 1-3
Lab 3.
Test
benches.
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- Spring '08
- Donnely
- Electronic design automation, Application-specific integrated circuit, ASIC Design Flow, design software Review, ) Design budgeting, Progress briefings
-
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