ten_gig_eth_mac_ds201

ten_gig_eth_mac_ds201 - 0 10-Gigabit Ethernet MAC v9.3...

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DS201 September 16, 2009 www.xilinx.com 1 Product Specification © 2004-2009 Xilinx, Inc. XILINX, the Xilinx logo, Virtex, Spartan, ISE and other designated brands included herein are trademarks of Xilinx in the United States and other countries. The PowerPC name and logo are registered trademarks of IBM Corp. and used under license. All other trademarks are the property of their respective owners. Introduction The LogiCORE™ IP 10-Gigabit Ethernet MAC core is a single-speed, full-duplex 10 Gbps Ethernet Media Access Controller (MAC) solution enabling the design of high-speed Ethernet systems and subsystems. Features • Designed to 10-Gigabit Ethernet specification IEEE 802.3-2005 • Choice of external XGMII or internal FPGA interface to PHY layer • Cut-through operation with minimum buffering for maximum flexibility in client-side interfacing • Supports Deficit Idle Count for maximum data throughput; maintains minimum IFG under all conditions and provides line rate performance • Configured and monitored through a microprocessor-neutral Management Interface • Comprehensive statistics gathering with statistic vector outputs • Supports flow-control in both directions • MDIO STA master interface to manage PHY layers • Extremely customizable; trade resource usage against functionality • Available under SignOnce license program • Delivered through the Xilinx® CORE Generator™ software • Supports VLAN, jumbo frames, and WAN mode • Custom Preamble mode 0 10-Gigabit Ethernet MAC v9.3 DS201 September 16, 2009 00 Product Specification LogiCORE IP Facts Core Specifics Device Family Speed Grades Virtex®-6 Virtex-6 Lower Power -1 -1 Virtex-5 -1 Virtex-4 -10 Resources Used 1 Slices LUTs FFs Block RAM 1803 3738 3652 0 Provided with Core Documentation Product Specification User Guide Getting Started Guide Design File Formats EDIF and NGC netlist Constraints File UCF Verification VHDL test bench Verilog test fixture Example Design VHDL and Verilog Design Tool Requirements Xilinx Implementation Tools ISE® software v11.3 Simulation Mentor Graphics ModelSim v6.4b and above Cadence IUS v8.1-s009 and above Synopsys 2008.09 and above Synthesis XST 11.3 Support Provided by Xilinx, Inc. @ www.xilinx.com/support 1. Numbers are approximate for default configuration in Virtex-5 devices. See Tables 21 through 23 for a complete description of device utilization by configuration and de- vice family.
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10-Gigabit Ethernet MAC v9.3 2 www.xilinx.com DS201 September 16, 2009 Product Specification Applications Figure 1 shows a typical Ethernet system architecture and the 10-Gigabit Ethernet MAC core within it. The MAC and all the blocks to the right are defined in Ethernet IEEE specifications. Figure 2 shows the 10-Gigabit Ethernet MAC core connected to a physical layer (PHY) device, for example, an optical module using the XGMII interface.
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ten_gig_eth_mac_ds201 - 0 10-Gigabit Ethernet MAC v9.3...

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