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Ch02b-CombinationalLogic

# Ch02b-CombinationalLogic - Clark Guest 2009 ECE 25 Logic...

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©Clark Guest 2009 ECE 25 Logic and Computer Design Circuit Costs Circuit simplifcation reduces circuit delay and circuit cost Circuit costs depend on: The number oF gates The number oF inputs to gates Then number oF variables used in both complemented and uncomplemented Forms Circuit delay depends on the number oF gates a signal passes through From input to output 15 ©Clark Guest 2009 ECE 25 Logic and Computer Design K-Maps For Simplifcation: 2 Variables K-map = Karnaugh Map 16 A\B 0 1 0 1 1 1 0 1 A B ± 0 0 1 0 1 1 1 0 0 1 1 1 ± = A’ + B K-Map ± = A’B’+AB’+AB A\B 0 1 0 1 0 1 1 0 A B ± 0 0 0 0 1 1 1 0 1 1 1 0 K-Map G = A’B+AB’ G = A’B+AB’ 0 1 2 3 0 1 2 3 ©Clark Guest 2009 ECE 25 Logic and Computer Design K-Maps For Simplifcation: 3 Variables A\BC 00 01 11 10 0 1 1 1 1 1 1 1 0 0 A B C ± 0 0 0 1 0 0 1 1 0 1 0 1 0 1 1 1 1 0 0 1 1 0 1 1 1 1 0 0 1 1 1 0 ±= ! m(0,1,2,3,45) 0 1 3 2 4 5 7 6 ±=A’+B’ G= ! m(0,2,45,6) A\BC 00 01 11 10 0 1 1 0 0 1 1 1 0 1 0 1 3 2 4 5 7 6 G=AB’+C’ H= ! m(1,3,4,5,6) A\BC 00 01 11 10 0 1 0 1 1 0 1 1 0 1 0 1 3 2 4 5 7 6 H=AC’+AB’+A’C

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Ch02b-CombinationalLogic - Clark Guest 2009 ECE 25 Logic...

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