Ch05b-Sequential

Ch05b-Sequential - Clark Guest 2009 ECE 25 Logic and...

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©Clark Guest 2009 ECE 25 Logic and Computer Design An Example Sequential Circuit 9 D C D C X A B Y D A = AX + BX D B = A’X Y = (A+B)X’ Clock Present State Input Next State Output A B X A B Y 0 0 0 0 0 0 0 0 1 0 1 0 0 1 0 0 0 1 0 1 1 1 1 0 1 0 0 0 0 1 1 0 1 1 0 0 1 1 0 0 0 1 1 1 1 1 0 0 State Table ©Clark Guest 2009 ECE 25 Logic and Computer Design Two-Dimensional State Table 10 Present State Next State Output X=0 X=1 X=0 X=1 A B A B A B Y Y 0 0 0 0 0 1 0 0 0 1 0 0 1 1 1 0 1 0 0 0 1 0 1 0 1 1 0 0 1 0 1 0 Mealy model: Outputs depend on state and inputs Moore model: Outputs depend only on state ©Clark Guest 2009 ECE 25 Logic and Computer Design State Diagram 11 00 01 11 10 0/0 1/0 0/1 1/0 0/1 1/0 1/0 0/1 ©Clark Guest 2009 ECE 25 Logic and Computer Design Sequential Circuit Design Procedure 12 Specifcation Formulation State Assignment Flip-Flop Input Equation Determination Output Equation Determination Optimization Technology Mapping Verifcation
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©Clark Guest 2009 ECE 25 Logic and Computer Design Specifcation: Smart Signal A north-south street crosses and east-west street Each street can sense cars From either direction
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This note was uploaded on 11/03/2009 for the course ECE ECE25 taught by Professor Bill lin during the Fall '09 term at UCSD.

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Ch05b-Sequential - Clark Guest 2009 ECE 25 Logic and...

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