cs3330-chap4-pipeline-4

cs3330-chap4-pipeline-4 - 1 ¡ Data Hazards ¢ Detection ¢...

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Unformatted text preview: 1 ¡ Data Hazards ¢ Detection ¢ Classification Last Time ¢ Handling ¡ Control Hazards and Branch Prediction CS/ECE 3330 – Fall 2009 98 ¡ “Unexpected” events requiring change in flow of control ¢ Different ISAs use the terms differently Exceptions and Interrupts 4.9 Exceptions ¡ Exception ¢ Arises within the CPU – e.g., undefined opcode, overflow, syscall, … ¡ Interrupt ¢ From an external I/O controller CS/ECE 3330 – Fall 2009 ¡ Dealing with them without sacrificing performance is hard 99 2 ¡ I/O request ¡ Invoke the operating system from user program Sample Exceptions ¡ Arithmetic overflow ¡ Undefined instruction ¡ Hardware malfunction CS/ECE 3330 – Fall 2009 100 ¡ Save PC of offending (or interrupted) instruction ¢ In MIPS: Exception Program Counter (EPC) Handling Exceptions ¡ Save indication of the problem ¢ In MIPS: Cause register ¢ We’ll assume 1-bit – 0 for undefined opcode, 1 for overflow ¡ Jump to handler at 8000 00180 CS/ECE 3330 – Fall 2009 101 3 ¡ Vectored Interrupts ¢ Handler address determined by the cause ¡ Example: An Alternate Mechanism ¢ Undefined opcode: C000 0000 ¢ Overflow: C000 0020 ¢ …: C000 0040 ¡ Instructions either ¢ Deal with the interrupt, or CS/ECE 3330 – Fall 2009 ¢ Jump to real handler 102 ¡ Read cause, and transfer to relevant handler ¡ Determine action required ¡ If restartable Handler Actions ¡ If restartable ¢ Take corrective action ¢ use EPC to return to program ¡ Otherwise ¢ Terminate program ¢ Report error using EPC, cause, … CS/ECE 3330 – Fall 2009 103 4 ¡ Another form of control hazard ¡ Consider overflow on add in EX stage add $1, $2, $1 Exceptions in a Pipeline ¢ Prevent $1 from being clobbered ¢ Complete previous instructions ¢ Flush add and subsequent instructions ¢ Set Cause and EPC register values ¢ Transfer control to handler CS/ECE 3330 – Fall 2009 ¡ Similar to mispredicted branch ¢ Use much of the same hardware 104 Pipeline with Exceptions CS/ECE 3330 – Fall 2009 105 5 ¡ Restartable exceptions ¢ Pipeline can flush the instruction ¢ Handler executes, then returns to the instruction Exception Properties – Refetched and executed from scratch ¡ PC saved in EPC register ¢ Identifies causing instruction ¢ Actually PC + 4 is saved – Handler must adjust CS/ECE 3330 – Fall 2009 106 ¡ Exception on add in 40 sub $11, $2, $4 44 and $12, $2, $5 48 or $13 $2 $6 Exception Example 48 or $13, $2, $6 4C add $1, $2, $1 50 slt $15, $6, $7 54 lw $16, 50($7) … ¡ Handler CS/ECE 3330 – Fall 2009 80000180 sw $25, 1000($0) 80000184 sw $26, 1004($0) … 107 6 Exception Example CS/ECE 3330 – Fall 2009 108 Exception Example CS/ECE 3330 – Fall 2009 109 7 ¡ Pipelining overlaps multiple instructions ¢ Could have multiple exceptions at once ¡ Simple approach: deal with exception from...
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This note was uploaded on 11/04/2009 for the course CS 333 taught by Professor Stankovic during the Fall '08 term at UVA.

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cs3330-chap4-pipeline-4 - 1 ¡ Data Hazards ¢ Detection ¢...

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