ee101_hw5_sol

ee101_hw5_sol - EE 101 Homework 5 Redekopp Name:...

Info iconThis preview shows pages 1–4. Sign up to view the full content.

View Full Document Right Arrow Icon
1 EE 101 Homework 5 Redekopp Name: __Solutions______________________________ Due: Score: ________ Show work to get full credit. Remember, use on only one side of the paper and staple them together. Only use a calculator to CHECK your work, not to DO your work. 1. (32 pts.) Perform the following addition and subtraction problems assuming 2‟s complement numbers. State whether overflow does or does not occur for each problem. Justify your answer for why overflow does or does not occur. (You can easily check your work by converting to decimal.) a.) 1010 0110 b.) 0010 0001 +1101 1011 +0111 1001 1 1000 0001 1001 1010 n+n=n c out =1,c in =1 No Overflow p+p=n c out =0,c in =1 Overflow c.) 1000 0010 d.) 0101 1001 -1010 1111 -1010 0101 || || 1000 0010 0101 1001 +0101 0000 +0101 1010 + 1 + 1 1101 0011 1011 0100 n+p=n c out =0,c in =0 No Overflow n+n=p c out =0,c in =1 Overflow
Background image of page 1

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
2 2. (20 pts.) For binary subtraction we take the 2‟s complement (1‟s complement + 1) of the bottom number and add it to the top number. Hexadecimal subtraction can be performed by taking the 16‟s complement (15‟s complement + 1) of the bottom number and add it to the top number. Use this method to perform the hex subtraction problems below, which are the hex equivalents of questions e,f,g and h from problem 4 above. You should be able to check your work by converting your binary answers above to hex. [Hint: The 15‟s complement is found by subtracting each digit of the number from F16 (=15 10 )]. a.) 82 b.) 59 - AF - A5 FF FF - AF - A5 50 5A 82 59 + 50 + 5A + 1 + 1 D3 B4 3. (10 pts.) Build an equivalent full-adder using two half-adders as building blocks along with additional gate(s) if needed. Answer: A B Half Adder Cout S A B Half Adder Cout S Cin X Y Carry Sum Note: We could use an XOR gate in place of the OR gate since both Cout’s will never be 1 at the same time.
Background image of page 2
3 4. (10 pts.) Using half-adders and full-adders design a circuit that takes in a 5-bit unsigned number, X (X 4 ..X 0 ) and produces an output equal to X + 21 10 . Your design should minimize the area required (i.e. use half-adders where possible.) Answer: Y = X + 21 = X 4 X 3 X 2 X 1 X 0 + 10101 The first bit addition does not have a carry in so we can use a half-adder (X 0 + 1). The second bit only adds the possible carry from previous step since the second bit in 21 is 0 (same for fourth bit). The third bit requires a full adder since (X 2 + 1 + CarryFromBit2), same for fifth bit. In total we use 2 full-adders and 3 half-adders.
Background image of page 3

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
Image of page 4
This is the end of the preview. Sign up to access the rest of the document.

Page1 / 9

ee101_hw5_sol - EE 101 Homework 5 Redekopp Name:...

This preview shows document pages 1 - 4. Sign up to view the full document.

View Full Document Right Arrow Icon
Ask a homework question - tutors are online