ee101_lab3

ee101_lab3 - EE 101 Lab 3 Logic Design w Karnaugh Maps 1...

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Last Revised: 9/17/2009 1 EE 101 Lab 3 Logic Design w/ Karnaugh Maps 1 Introduction In this lab you will implement a 3-bit incrementer circuit (i.e. it adds 1 to the input number) using Karnaugh maps to find the simplest implementation. Your circuit will take a 3-bit, unsigned number X[2:0] as input and produce an output Y[2:0] = X[2:0] + 1 (wrapping back to ‘00 0 when X is the maximum input value). 2 What you will learn This lab is intended to teach you how to design multiple-output logic functions with Karnaugh maps. In addition, you will need to convert your AND-OR circuits to a NAND-gate circuits. 3 Background Information and Notes Multiple-output functions : This design takes 3-bits, X[2:0], as input and produces a 3-bit output, Y[2:0]. When designing a logic circuit w/ multiple outputs, the simplest technique is to simply treat each output bit as a separate function of the inputs (i.e. design Y[2] as a function of X[2:0], then design Y[1] as a separate function of X[2:0], etc.) [ Note : While techniques exist to minimize the total gates needed to implement all outputs (i.e. the sum of gates used to implement all three outputs), we will use the Karnaugh map method which simply tries to find a minimal, 2-level implementation for each output bit independently. 74xx10 Chip
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ee101_lab3 - EE 101 Lab 3 Logic Design w Karnaugh Maps 1...

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