EE101Lecture11

EE101Lecture11 - Mark Redekopp, All rights reserved...

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Unformatted text preview: Mark Redekopp, All rights reserved Introduction to Digital Logic Lecture 11: Cascading Decoders Implementing Functions w/ Decoders Encoders & Priority Encoders Mark Redekopp, All rights reserved Decoder w/ Multiple Enables When a decoder has multiple enables, all enables must be active for the decoder to be enabled D0 D1 D2 D3 D4 D5 D6 D7 X (MSB) Y Z (LSB) E /G2 /G1 3 Enables /G1 must equal 0 /G2 must equal 0 and E must equal 1 Overall enable /G1 /G2 E Mark Redekopp, All rights reserved Implementing Logic Functions F = MNO (2,3,4,6) = m 2 + m 3 + m 4 + m 6 Since decoders are just minterm generators, just OR together the appropriate minterms D0 D1 D2 D3 D4 D5 D6 D7 X (MSB) Y Z (LSB) F M N O Mark Redekopp, All rights reserved Implementing Logic Functions F = MNO (2,3,4,6) = m 2 + m 3 + m 4 + m 6 If we have active-low outputs just invert back to active-hi OR gate becomes NAND gate D0 D1 D2 D3 D4 D5 D6 D7 X (MSB) Y Z (LSB) F 1 1 1 1 1 1 1 1 1 1 Add another level of bubbles to cancel the active- low outputs OR => NAND Key: w/ active-lo outputs use NAND gates Mark Redekopp, All rights reserved Decoder/Logic Function Summary To produce F Active-hi outputs Active-lo outputs Fewer minterms in F Implement F with OR gate Implement F with NAND gate Fewer minterms in F Implement F with NOR gate Implement F with AND gate Mark Redekopp, All rights reserved Building Larger Decoders Using the building- block methodology, cascade smaller decoders to build larger ones Well use stages of decoders The output of each decoder in one stage should connect to the enable of the another decoder in the next stage Mark Redekopp, All rights reserved Cascading Decoders Connect outputs of first stage to enables of next stage Usually, MSBs are connected to the first stage, LSBs to the following stages Stage 1 Stage 2 Overall Enable 2-to-4 decoder MSB in connects to 1 st stage 4 ouputs D D 1 A E D D 1 A E D D 1 A E X Y Y E D D 1 D 2 D 3 Mark Redekopp, All rights reserved Cascading Decoders To understand how this works think of the process of elimination Given a 2-bit number X,Y (X = MSB) If I tell you X=1, what are the possible numbers we can have2 or 3 If I then tell you Y=0, then you know the number is 2 By decoding one bit at a time we can eliminate half of the possibilities until we get down to the actual number Mark Redekopp, All rights reserved Cascading Decoders E X Y D0 D1 D2 D3 x x 1 1 1 1 1 1 1 1 1 1 1 1 D D 1 A E D D 1 A E D D 1 A E X=1 Y=0 Y=0 E=1 D D 1 D 2 D 3 Example: X=1,Y=0 = 0 = 0 = 1 = 0 1 w/ X=1 we can narrow it down to D 2 or D 3 and you see that the lower decoder in the second stage is the one that is enabled Mark Redekopp, All rights reserved Cascading Decoders E X Y D0 D1 D2 D3 x x 1 1 1 1 1 1 1 1 1 1 1 1 D D 1 A E D D 1 A E D D 1 A E X=1 Y=0 Y=0 E=1 D D 1 D 2 D 3 Example: X=1,Y=0 = 0 = 0 = 1 = 0 1 The top decoder is disabled so its...
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EE101Lecture11 - Mark Redekopp, All rights reserved...

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