EE101Lecture19

EE101Lecture19 - Introduction to Digital Logic Lecture 19 State Machines State Machine Analysis Mark Redekopp All rights reserved Characteristic

Info iconThis preview shows pages 1–9. Sign up to view the full content.

View Full Document Right Arrow Icon
© Mark Redekopp, All rights reserved Introduction to Digital Logic Lecture 19: State Machines State Machine Analysis
Background image of page 1

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
© Mark Redekopp, All rights reserved Characteristic Equations With latches and flip-flops we can come up with an equation for the next value of Q (Q*) in terms of the current value of Q and the inputs S R Q* 0 0 Q 1 0 1 0 1 0 1 1 illegal S R Q Q* 0 0 0 0 0 1 0 1 0 0 1 1 1 0 0 1 0 1 1 1 0 1 1 1 Function Table (Q* listed in terms of Q) Truth Table (Q* in terms of 0 or 1)
Background image of page 2
© Mark Redekopp, All rights reserved Characteristic Equations With latches and flip-flops we can come up with an equation for the next value of Q (Q*) in terms of the current value of Q and the inputs S R Q* 0 0 Q 1 0 1 0 1 0 1 1 illegal S R Q Q* 0 0 0 0 0 0 1 1 0 1 0 0 0 1 1 0 1 0 0 1 1 0 1 1 1 1 0 d 1 1 1 d Function Table (Q* listed in terms of Q) Truth Table (Q* in terms of 0 or 1)
Background image of page 3

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
© Mark Redekopp, All rights reserved Characteristic Equations For an SR-Latch make a truth table with S,R, and Q and show the next value of Q* The use a K-Map to find an equation for Q* This equation indicates what the next value of Q will be S R Q Q* 0 0 0 0 0 0 1 1 0 1 0 0 0 1 1 0 1 0 0 1 1 0 1 1 1 1 0 d 1 1 1 d Q* = S + R‟Q 0 d 1 1 d 0 1 0 0 6 4 5 7 3 1 00 01 11 10 0 1 2 SR Q
Background image of page 4
© Mark Redekopp, All rights reserved Characteristic Equations For a D-Latch make a truth table with D, and Q and show the next value of Q* You may use a K-Map but we can eyeball it This equation indicates what the next value of Q will be D Q Q* 0 0 0 0 1 0 1 0 1 1 1 1 Q* = D
Background image of page 5

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
© Mark Redekopp, All rights reserved Characteristic Equation For a JK-FF make a truth table with J,K, and Q and show the next value of Q* The use a K-Map to find an equation for Q* This equation indicates what the next value of Q will be J K Q Q* 0 0 0 0 0 0 1 1 0 1 0 0 0 1 1 0 1 0 0 1 1 0 1 1 1 1 0 1 1 1 1 0 0 1 1 1 0 0 1 0 0 6 4 5 7 3 1 00 01 11 10 0 1 2 JK Q Q* = JQ‟ + K‟Q
Background image of page 6
© Mark Redekopp, All rights reserved State Machines Provide the “brains” or control for electronic and electro - mechanical systems Implement a set of steps (or algorithm) to control or solve a problem Goal is to generate output values at specific times Combine Sequential and Combinational logic elements – Sequential Logic to remember what step (state) we’re in Encodes everything that has happened in the past Combinational Logic to produce outputs and find what state to go to next Generates outputs based on what state we’re in and the input values Use state diagrams (a.k.a. flowcharts) to specify the operation of the corresponding state machine
Background image of page 7

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
© Mark Redekopp, All rights reserved Washing Machine State Diagram Boxes represent states or steps in the algorithm Arrows = transitions w/ conditions telling us when to take that transition Output values can be associated with a state and transition or just with a state Idle N=2 Fill WV = 1 Agitate Motor = 1 Drain DV = 1 N = N - 1 N > 0 N = 0 COINS + DOOR COINS • DOOR FULL FULL 5 MIN 5 MIN / Reset_Timer=1 EMPTY EMPTY Outputs Generated Transition Conditions /RESET
Background image of page 8
Image of page 9
This is the end of the preview. Sign up to access the rest of the document.

This note was uploaded on 11/08/2009 for the course EE 101 at USC.

Page1 / 42

EE101Lecture19 - Introduction to Digital Logic Lecture 19 State Machines State Machine Analysis Mark Redekopp All rights reserved Characteristic

This preview shows document pages 1 - 9. Sign up to view the full document.

View Full Document Right Arrow Icon
Ask a homework question - tutors are online