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Unformatted text preview: BEIN— Auf 08/06]
z< Salmon to HW #1 >>
1. Accorﬁhnj to s‘thlcz Ionj channel macleis ;
._ K °1
ID “ 7:2" (V66— Vt) cl)
 ‘ W
Where K 15 “Cox 3
VGS1=I5V » ID': 200 “A
VC‘SQ: 1 V >§ ID; = I ' ‘9
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9.
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Ur = U 5 —* Vt W
k‘ W Cl'uvcn U3 0”“; V515 — I01 I
200 — JE— (15~O$)R
HA ' R EE114 HW#1 Solution
Analog Integrated Circuit Design September 25, 2008 Problem 2 Textbook Problem 2.18: SIS FIE (a)S (b) Solution 1: We will study the given structure as a threeterminal device and consider its behavior under dif—
ferent bias conditions: 1. VGS < Vt:
Obviously, in this case both devices are off and there is no current ﬂowing from source to drain, therefore, the
behaviors of both structures are the same. 2. VGS > Vt and VDS < VGS — Vt: it is straightforward to show that given these conditions both transistors will be in triode region. M1 is on and
has to be in triode. M2 cannot be off because if M2 is off the current through M1 must be zero, which means
that V1351 is zero (remember that M1 is on.). ' If V1331 is zero then VGS2 would be equal to Vasl, and therefore
our initial assumption that VG52 is smaller that Vt is invalid. Now that we know both transistors are in triode, we have: W . i v2
11 = uncomL—1((Vas  vavpm — 13231) (*)
W V2
12 = #nComL—Z ((VGS — VDSI * Vt)VDS2 # 13252)
we also have: i
I1 = 12 = I and VDS = VDSl + VDS2 thus: W V — V 2 I = MnCoxL— ((VG'S' * VDSl  Vt)(VDs — V1351) — (BS—212$)
2
W V2 V2
= ,unCom_((VGS — Vt)VDS  ~Q§ VD51(VGS — Vt) + D51)
L2 2 2
\_._____\,._—/
From = —W—”nC:;L_1 Simplifying this equation a little bit we get: L1 _ W V53 [(1 + 13—2)  MnCoz—i; ((VGS — Vt)VDS — T)
_ W V55
: I — HnCom L1 + L2 ((VGS "‘ Vt)VDS _ lof?? EE‘14 HW#1 Solution
Analog Integrated Circuit Design September 25, 2008 which is the same result as a single transistor with a channel length of L1 + L2 in triode region. 3. VGS > Vt and VDs > V05 — Vt:
In this case M1 is in triode and M2 is in forward active region. To prove this let us assume that M1 is in active
region too, hence we have: Vas — Vt < V1351
=> VGS“VDSI<Vt—> Mgisoff
\—v—/ VGSZ which shows that our initial assumption of M1 being in active region has been wrong. The other possibility, i.e.,
both M1 and M2 being in triode can also be shown to be impossible using the same method. Now given that M1 is in triode and M2 is in active region we can write down the equations as follows: 1 W 2
12 = iﬂncozf; (VGS — VDSI ~ Vt)
W » V2
II : MnComfl((VGS "' VDVDSI _ D251) Since the current passing through both devices is the same, we can get the following equation:
(L1 + L2)Vr2>31 — 2(L1 + L2)(VGs — Vt)VDSI + L1(VGs  V92 = 0 which after a little bit of math crunching leads to: V1331: VGS — V i ———(VGS ‘ Vt) V L3 + Lle t L1 +L2 iM VL2
VLl + L2 :VGS‘l/t—VDSI= therefore, 1 W l W __ _ _ _ ‘_ 2 : _ _________ __ 2
I — 2pn00$ L2 (VGS Vt VDSl) 2NnCom L1 + L2 (VGS which is again equivalent to the equation for a transistor with a channel length of L1 + L2 in forward active
region. So we have proved that the given structure has exactly the same behavior as a single transistor with the effective channel length of L1 + L2 in all operating conditions. 2of?? EE'14 HW#1 Solution
Analog Integrated Circuit Design September 25, 2008 Solution 2: Another elegant way to solve this problem is to put on your device hats and think of it as a
solid—state structure. The following ﬁgure shows the cross—sectional view of the given structure. As depicted
in this ﬁgure, the overall structure looks like a transistor with an effective channel length of L1 + L2. This
happens because all the electrons that enter the channel at 81 have to go through both channels. Note that the
diffusion area in between (D1 or S2) does not affect carriers movement since it is assumed to be highly—doped.
Furthermore, the transistor on the left cannot be in forward active region because once channel 1 pinches off the
other transistor will deﬁnitely turn off (for similar reasons as mentioned in the previous part). In other words
the left transistor can only operate in triode region. Putting all these together you can easily conclude that this
structure is just a transistor whose channel is the sum of two smaller channels of length L1 and L2. One can
write integrals similar to those in the lecture notes to ﬁnd the characteristic function to be: 1 W I = — — — 2
2Nn00m L1 + L2 (VGS G1) G2 P—substrate 3of?? 3 ' ACCOVCMUS to a;ch 3 (‘eCA 3) D “Hm: \oxje
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