EE114_HW1

# EE114_HW1 - EE114 Autumn 08/09 R. Dutton, B. Murmann Page 1...

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Unformatted text preview: EE114 Autumn 08/09 R. Dutton, B. Murmann Page 1 of 2 Last modified 9/14/2008 2:51:00 PM HOMEWORK #1 (Due: Friday, October 3, 2008, noon PT) You will not need (and should not use) Spice for any part of this problem set. Use simple long channel MOS models in all problems (ignore second order effects such as finite output resistance in the saturation region, back-gate effect, etc.). 1. An NMOS transistor biased in saturation carries a drain current of 200 A when V GS = 1.5V is applied. With V GS = 1V, the current drops to 50 A. Determine V t and K = C ox W/L of this transistor. 2. Show that two MOS transistors with channel lengths L 1 and L 2 and identical channel widths can be modeled as one equivalent MOS transistor with length L 1 +L 2 as shown below. Assume that M1 and M2 are identical except for their channel lengths. Hint: there are (at least) two ways to solve this problem. One is through extensive algebra; the other is though physical insight and arguments based on the MOSFET cross-...
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## This note was uploaded on 11/09/2009 for the course EE 114 at Stanford.

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EE114_HW1 - EE114 Autumn 08/09 R. Dutton, B. Murmann Page 1...

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