EE114_HW5_Solution

EE114_HW5_Solution - E13114 Autumn 08/09 R. Dutton, B....

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Unformatted text preview: E13114 Autumn 08/09 R. Dutton, B. Murmann Page 1 of 3 HOMEWORK #5 (Due: Friday, October 31, 2008, noon P1) A In this problem set, please refer to EE114 technology device parameters from lecture 7 slide [2 whenever you need device constants in your calculations. \ ’31- O l 1. Consider the two source follower circuits shown in Fig. la and Fig. 1b. a) Q0 1 ll 8N + Vl Goicachvl 1C) : 5 "—9 Sjmbolic expr. «1*» gun W50 ’l ~> error 10 0) Suppose that the output voltage swings from 2V to 4.5V in both circuits. Calculate the corresponding voltage swings at the gate nodes, for RL=1k.Q and RL=1M§2. Determine these values using the transistor’s large signal model. Summarize your results in a table. Explain how different values for RL and how the two different Bullrconnectig schemes effect the required input voltages. ~ mall signal equivalent for the circuit of Fig. 1a. Find an analytical expression for the low frequency small signal gain avo=vo/vi as a function of RL and the DC voltages V1 and V0. Calculate the small signal gain at Vo=2V and Vo=4.5V using RL=1k£2. Calculate the percent change in small signal gain when V0 changes from 2V to 4.5V. Verify your results from part (b) using HSpice. First, perform a .dc analysis to find the input voltages that correspond to the given output voltages. Next, run a .tf (transfer function) analysis for each bias point to find the small signal gains (Note: please consult the HSpice manual to learn how to set up a .tf analysis). The result of this analysis will be added to listing (.lis) output file. Print out the portions of .lis file that show the transistor biasing information and the results of the transfer function analysis. Calculate the percent change between the small signal gain at Vo=2V and V0=4.5V. Last modified 10/24/2008 12:21:00 PM EE M. Fem 08 —- 0C! —« SoN‘c‘xOn @ Firs-t of a“ we in Fla 1.0 (wklnowt A SSum‘mj V0 = RV RL : \KJL 0) =_= iv .RL: ‘M/L to: \l ‘10: WSV iv - . I R __ >> \[I = w __ “'05 =_- 3.74651\ L—WKJL aswsooxxK v U: 0 .=‘* 9:: fig 'Vo == “'5 RL == ‘ 9516500“ M For "the. ’SeconA dram-k. everflfin‘xnj remains unchangeé \oud: t‘n‘a "daresde uoxtage ' of fine MOSFET ~ We Know that due Jco \ooxckg ache efefct; ’Hnreskolci \JOPCQSC Qi“ \oe, MoAula'EeA v01;er \ISB w‘l‘tk We. fouow‘u’ls c364. \V-t\ :2. hut—0‘ ‘\" X KJR§+\VSB\ _ )- 1n EE\N .Tecknaojg (Shae \2 / 'Lect '1“. y 99?? = o-Bv SO we \navc t0 *anA ncu) \Lt for \lcza , q.5 \loégv'» \Isgzn—s _ » NUA: 0.5+oég (JO-8+3 —Jo-8) >5 \VtP\ = 145g (change LS 0.63;?) \Io 3”- <2 ” \f =L’5 Q: m = \_K ‘2’ I MNLTZ/P kxzo #— ‘74‘ mv) 'Vozav . R _, *7 MEL) \/o .2: W5 ===> V53 3 “0'5. 9? \x/th: 0‘5 —\— 0.6 KJog—kq ~— on-B ). :— QRT‘WMV {Change ‘03 “\th qmvl \lcw :— \V&S\—l\i-t‘ ‘ :2 V0 - \/I —— \VtP\ (*y ._. '2’ S e ‘ 1D — $3 68:» m wave» a? & )\ \IGV‘ VOV RL(I+)\\/o) \ +EL \ \+RLX—‘§§Q%) Voffmmo >‘ 'KTE' Gt} V0? (H'WH I vfi—\\wfl [M : oZBM/Va x 500 x0633x (K '\+ «K x 04 x SLSOXSLEX Co~®33)a‘ k WW“ «+num- RV IICKQhSQf, \03 LAma$e when \{0 waffles f‘rom ‘ El W5 ‘ i HWS Problem 1 (c) Vo=2V Hspice desk: * EE114 HWS Problem1(c) * S. Liu, Fall 2008 (Thanks L‘|u\ \ .inc /usr/Class/eell4/hspice/eell4_hspice.sp ‘ .param v_i = 0.86754 ! vi vg 0 dc 'v_i' ac l vdd vdd 0 5 r1 vdd vo 1000 _ mp1 0 vg vo vo pmosll4 w=500u l=lu .option post brief nomod .op .tf v(vo) vi .end JB: subckt element O:mpl model O:pmosll4. region Saturati id —3.0000m ibs 0. ibd 20.0000f vgs -1.1325 1 vds —2.0000 1 vbs O. vth —500.0000m vdsat —632.456lm vod —632.4561m beta 15.0000m gam eff 600.0000m gm 9.4868m gds 250.0004u gmb 3.1820m cdtot 630.2832f cgtot 1.2786p cstot 1.6438p cbtot 1.0132p cgs l 0167p cgd 253.0667f **** small—signal transfer characteristics v(vo)/vi_ i: 883.5783m 3 input resistance at vi = l.OOOe+2 output resistance at v(vo) = 93.1373 Vo=45V Hspice desk: * EE114 HWS Probleml(c) * S. Liu, Fall 2008 .inc /usr/class/eell4/hspice/eell4_hspice.sp m \ .param v_i = 3.7651 s ‘ vi vg 0 dc 'v_i' ac 1 vdd vdd O 5 rl vdd V0 1000 mp1 0 vg vo vo pmosll4 w=500u l=lu .option post brief nomod .op .tf v(vo) vi .end .lis: subckt element 0:mpl model 0:pmosll4. region Saturati id —500.0096u ibs O. V ibd 44.9999f v s -734.8904m K vds —4.5000 ] vbs O. vth —500.0000m vdsat —234.8904m vod —234.8904m beta 18.1250m gam eff 600.0000m gm 4.2574m gds 34.4834u gmb 1.4280m cdtot 544.2860f cgtot 1.2962p cstot 1.6438p cbtot 937.1499f cgs 1 0167p cgd 256.9000f **** small—signal transfer characteristics v(vo)/vi ‘ = 804.5146m } input resistance at vi = 1.000e+20 output resistance at v(vo) = 188.9691 EE114 Autumn 08/09 R. Dutton, B. Murmann Page 2 of 3 ii] 2. Fig. 2 shows a cascode current source consisting of MIA and MlB, and a single transistor current source consisting of M2. Assume that the cascode current source is optimally biased, i.e. V313 is chosen such that V9313=VD31Mat=VOVIa. Assume also that both current sources supply the same current 10. Neglect backgate effect. i LIV a) Find relationships between W1, L1 and W2, L2 such that both current sources have the same parasitic output capacitance, and the same minimum output voltage Vomin that keeps all the devices saturated. For simplicity, assume 2:0 in this part of the analysis. Note: the parasitic capacitance at the drain of M2 is given by Cdb+ng. Similarly, assume that the output capacitance of the cascode current source is approximately equal to Cdb+ng of Mlb. (In the cascode current source the effect of other capacitances in the output node is negligible.) 1 O b) Using the result from part (a), show that R01 ~ ng - r01 R02 _ 4 where R01 and R02 are the output resistances of each current source, as indicated in Fig. 2. 6 0) Calculate Vomin, R01 and R02 for Io=100uA and (W/L)1=10um/2um. (Assume that the relationships between device sizes in part (a) hold.) R01 R02 lol lol M11) VB1B W1/|_1 M 2 M V32 W2/L2 V 1a B1A W1/L1 Fig. 2 Last modified 10/24/2008 12:21:00 PM Condi‘kiOh I RmPHeS W‘ 2 W9” Because / CO“) 2 £93“ + PS CaSw q! \—\—-\IDB (bk \IDB )Mflw PB PB wkere AS: W ~ Lchff PS 2: W"? «ll—cuff ><> €134 —\— Cc“: Rs “(just a fume.th of ConSK'HOh 1 _ m: _ Vow; ‘- W "‘ \lovm + \IOVHO V . P (T3,; M1a OmA flab ' ‘ ‘ awe ESame Swat ‘_ W St 1.3 ”“ MW 2 H w»- L 1 “1%?” —_ r Day —- Q3L ._, r __ La 2 “(L‘ 5> 09v LHO1 a %> R0‘ 3 fight“ (0\ : 3 m\ ro\ ROéL Aro‘ x "\ 29. -* 2 / 10 W/éLKPLLXLD RXS%AX & xmo 9m —- same“ Vms Ro‘ : 800K x 0 (23,36 )EBPQK L‘ » we VTT’he actual vamc is \arger‘ than this Ibeaause‘ of J€qu hand in aPlorowimm-ti ons we Our Conan och‘on EE114 Autumn 08/09 R. Dutton, B. Murmann Page 3 of 3 i 50 3. Given is the self-biasing Vt reference circuit in Fig. 3 with the following parameters: (W/L)1= 50; (W/L)3 = (W/L)4 = (W/L)5. Assume k=0 and neglect backgate effect. 1 O a) Find the value for R so that low: IOOuA. 1 O b) Find the Sensitivity of IOUT to changes in the threshold voltage Vt. Calculate the percent change AIOUT/IOUT for a 100mV change of Vt. Note: to first order, only changes of the threshold voltage of M1 are significant. 10 c) Find the Fractional Temperature Coefficient, TCF, of IOUT. The resistor R has a temperature coefficient of lZOOppm/°C. Assume th/dT = -l.2mV/°C and neglect the temperature dependence of the mobility, n. VDD R M2 TUT M3 M4 M5 Fig. 3 VDD M1 Last modified 10/24/2008 12:21:00 PM :3, mm 2 mm I = ~E—K w 3 w &“ b (a T: G‘SI\""\\IVPH 9~ 1 out ‘ W +‘LbP 1ovfc = 1C3de KP :: «15 PA/VQ- : ‘5 x . 1 Z 50 >> mg)“ 6& (Rmogfi 05 w : » V Iowt 3V 2 810W") X Vt 61cm!” W I ,_ WWW ,, = K £————) R10 \1 him: avtp P \— 1 K TP><R_ Emit? 6610M; KP ’Ui)‘\\kR1°ut+VtP3 W a Vt‘o W "‘ KP (\R:°vr’€+\l‘*€\=w g k: TL“ng 6:1th : QVEMyl x '50 x- 0‘“ I I W . an? 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This note was uploaded on 11/09/2009 for the course EE 114 at Stanford.

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EE114_HW5_Solution - E13114 Autumn 08/09 R. Dutton, B....

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