DS2Ee2303Project3F09

# DS2Ee2303Project3F09 - University of Texas at Arlington EE...

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University of Texas at Arlington EE 2303 Fall 2009 Design/Pspice/Analysis Set #3 Assigned 10/28/09 Due 11/09/09 1. Chose a partner and submit one report 2. Your report must have the following: a. Title page (including your names, course number, date) b. Design objective and specifications c. Design steps (including the circuit topology and netlist) d. Use realistic components and their Pspice models. e. Computer simulation and design verification and modification f. Conclusion. Problem 1 The following Netlist represents a 4 resistor biased transistor. Use PSPICE to determine the Q point. Biasing Point Calculation VCC 2 0 DC 15 R1 2 1 13.16k R2 1 0 8.06k RC 2 3 500 RE 4 0 495 Q1 3 1 4 Q2N2222 .MODEL Q2N2222 NPN (BF=100 IS= 3.295E-14 VA=200) .OP .END Problem 2 Consider the following biasing circuit Fig. 4.10 in Hambley. Use the Q2N2222 transistor with parameters given in Problem 1. Let v out = v CE USE PSPICE to perform the following : A. Let v in = 0. Generate a plot of v out vs. V BB (Transfer Characteristic) for V

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DS2Ee2303Project3F09 - University of Texas at Arlington EE...

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