07_Adding_Custom_IP_Lab - 1 Adding Custom IP to an Embedded...

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Unformatted text preview: 1 Adding Custom IP to an Embedded System Lab Objectives This lab demonstrates how to create and add custom IP to an existing PowerPC system using the Xilinx Platform Studio (XPS) Create/Import Peripheral Wizard. The system from the previous lab will be used as the starting point. The lab will show How to create a custom PLB IP using the wizard How to customize the peripheral How to add the new peripheral to the embedded project Requirements & ISE 9.2.04 & EDK 9.2.02 & ML403 Board & Platform USB Cable & RS232 Cable & Completion of the Adding EDK IP to an Embedded System Lab Reference & Platform Studio Help & Platform Studio SDK Help & Embedded System Tools Reference Manual & ML40x User Guide Overview The lab is divided into five main steps: creating the custom core using the custom peripheral wizard, customizing the peripheral created, adding the new IP, writing code for the IP, and testing the system on the FPGA. The test application will reside in Block memory inside the FPGA. Below is a block diagram of the hardware platform. We will create the custom IP to use the LCD display on the board. PowerPC BRAM Timer PLB v46 GPIO UART Interrupt Controller Timer Interrupt PowerPC Interrupt GPIO BTN Custom PLB LCD PowerPC BRAM Timer PLB v46 GPIO UART Interrupt Controller Timer Interrupt PowerPC Interrupt GPIO BTN Custom PLB LCD Lab Steps 2 I. Creating a Custom PLB IP Using the Wizard We will use the Create/Import Peripheral wizard in XPS to create a new custom IP for the existing system. 1. The ML403 board has a 16-character x 2-line LCD (Lumex LCM-S01602DTR/M) on the board to display text information. The data interface to the LCD is connected to the FPGA to support 4-bit mode only. We will create the new peripheral to handle the hardware interface to the LCD. To simplify the code, only writing to the LCD will be supported. 2. Open the ISE project completed in the Adding EDK IP to an Embedded System Lab . 3. In ISE double-click on Manage Processor Design to start XPS. 4. In XPS , go to Hardware > Create or Import Peripheral… Click on Next . 5. Make sure that Create templates for a new peripheral is selected then click Next . 6. Select To an XPS project . Click on Next . 7. Enter the name for the new peripheral, plb_lcd , and then click Next . 8. Select Processor Local Bus (PLB). Click Next . 9. The IPIF is a module isolating the user interface to the bus. In addition to facilitating bus attachment, the IPIF provides additional optional services. The services include software registers, user address range, FIFOs, software reset, interrupt support and bus-master access. 10. We will only be using software registers to control the peripheral. Select User logic software register ....
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07_Adding_Custom_IP_Lab - 1 Adding Custom IP to an Embedded...

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