EL 6183 Week 8

EL 6183 Week 8 - EL 6183 EE 4163 EL Digital Signal...

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Unformatted text preview: EL 6183 EE 4163 EL Digital Signal Processing Lab Digital March 30: Quiz #3 on IIR March Start Lecture #8 Start April 6: Finish Lecture 8 April 13: Quiz #4 on DFT Start Lecture #9 Start Distribute Final Projects Distribute April 20: Finish Lecture 9 April 27: Quiz #5 on Assembly Program ming ming EL 6183 EE 4163 EL Digital Signal Processing Lab Digital Monday 03/30/09 EL 6183 / EE 4163 DIGITAL SIGNAL PROCESSING LAB Processor Architecture Instruction Set Assembly Program and LAB # 8 EL 6183 Digital Signal Processing Lab Digital Monday March 30, 2009 1. Processor Architecture 2. C6713: 1. Architecture 2. Instruction Set 3. Assembly Programming 3. Paper Lab EL 6183 EE 4163 EL Digital Signal Processing Lab Digital DATA TYPE SIZE EL 6183 EE 4163 Digital Signal Processing Lab Digital Von Newmann Architecture EL 6183 EE 4163 Digital Signal Processing Lab Digital EL 6183 EE 4163 Digital Signal Processing Lab Digital EL 6183 EE 4163 Digital Signal Processing Lab Digital EL 6183 EE 4163 Digital Signal Processing Lab Digital EL 6183 EE 4163 EL Digital Signal Processing Lab Digital STRUCTURE OF ASSEMBLY CODE EL 6183 EE 4163 Digital Signal Processing Lab Digital EL 6183 EE 4163 Digital Signal Processing Lab Digital EL 6183 EE 4163 EL Digital Signal Processing Lab Digital Fixed Point vs Floating Point Representation Fixed Point Representation N-bit fixed Point Numbers Range: − 2 to 2 N −1 − 1 Signal Value between –V to +V N −1 Quantization Level: 2V N −1 2 Fixed Point instructions executed faster than floating EL 6183 EE 4163 Digital Signal Processing Lab Digital Fixed Point vs Floating Point Representation Floating Point Representation: IEEE Standard Single Precision S EEEEEEEE FFFFFFFFFFFFFFFFFFFFFFF 01 89 31 If E=255 and F is nonzero, then V=NaN ("Not a number") If E=255 and F is zero and S is 1, then V=-Infinity If E=255 and F is zero and S is 0, then V=Infinity If 0<E<255 and F is non zero then V=(-1)S * 2 E-127 * (1.F) If E=0 and F is nonzero, then V=(-1)S * 2 -126 * (0.F) If E=0 and F is zero and S is 1, then V=-0 If E=0 and F is zero and S is 0, then V=0 EL 6183 EE 4163 Digital Signal Processing Lab Digital Floating Point Representation: IEEE Standard Double Precision S EEEEEEEEEEE FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF 01 11 12 63 If E=2047 and F is nonzero, then V=NaN ("Not a number") If E=2047 and F is zero and S is 1, then V=-Infinity If E=2047 and F is zero and S is 0, then V=Infinity If 0<E<2047 and F is non zero then V=(-1)S * 2 E-1023 * (1.F) If E=0 and F is nonzero, then V=(-1)S * 2 -1022 * (0.F) If E=0 and F is zero and S is 1, then V=-0 If E=0 and F is zero and S is 0, then V=0 EL 6183 EE 4163 EL Digital Signal Processing Lab Digital Syntax of Some Assembly Instructions Addition EL 6183 EE 4163 EL Digital Signal Processing Lab Digital Syntax of Some Assembly Instructions Addition EL 6183 EE 4163 EL Digital Signal Processing Lab Digital Syntax of Some Assembly Instructions Multiplication EL 6183 EE 4163 EL Digital Signal Processing Lab Digital Syntax of Some Assembly Instructions Multiplication EL 6183 EE 4163 EL Digital Signal Processing Lab Digital Syntax of Some Assembly Instructions Multiplication EL 6183 EE 4163 EL Digital Signal Processing Lab Digital Syntax of Some Assembly Instructions Multiplication EL 6183 EE 4163 EL Digital Signal Processing Lab Digital Syntax of Some Assembly Instructions Move Instructions The MVC Move Instruction The MVC Instruction is used only with .S2 Syntax of Some Assembly Instructions Move Instructions EL 6183 EE 4163 EL Digital Signal Processing Lab Digital Syntax of Some Assembly Instructions Move Instructions EL 6183 EE 4163 EL Digital Signal Processing Lab Digital Syntax of Some Assembly Instructions Move Instructions EL 6183 EE 4163 EL Digital Signal Processing Lab Digital Syntax of Some Assembly Instructions Move Instructions EL 6183 EE 4163 EL Digital Signal Processing Lab Digital Syntax of Some Assembly Instructions Move Instructions To move 16 bit constant, use MVK To move 32 bit constant, use MVKL & MVKH Ex: mvkl .S1 0x12345678 mvkh .S1 0x12345678 EL 6183 EE 4163 EL Digital Signal Processing Lab Digital Syntax of Some Assembly Instructions Move Instructions EL 6183 EE 4163 EL Digital Signal Processing Lab Digital Syntax of Some Assembly Instructions Branch Instruction EL 6183 EE 4163 Digital Signal Processing Lab Digital Syntax of Some Assembly Instructions Conditional Branch Instruction If A Register [R] Before the branch instruction Branch if R ≠ 0 If A Register ![R] Before the branch instruction Branch if R = 0 R can be only: A0, A1, B0, B1, B2 EL 6183 EE 4163 EL Digital Signal Processing Lab Digital Example 1. ;SUMFUNC.ASM Assembly function to find n+(n-1)+...+ ; Consider that register A4 is initialized with 6. .def _sumfunc ;function called from C _sumfunc: MV .L1 A4,A1 ;setup n as loop counter SUB .S1 A1,1,A1 ;decrement n LOOP: ADD .S1 A4,A1,A4 ;store result in A4 SUB .S1 A1,1,A1 [A1] B .S2 LOOP NOP 5 B .S2 B3 NOP 5 .end ;decrement loop counter ;branch to LOOP if A1#0 ;five NOPs for delay slots ;return to calling routine ;five NOPs for delay slots Manual Execution: See Page 39 EL 6183 EE 4163 EL Digital Signal Processing Lab Digital Load and Store: Addressing Mode Linear Addressing Mode EL 6183 EE 4163 Digital Signal Processing Lab Digital EL 6183 EE 4163 Digital Signal Processing Lab Digital EL 6183 EE 4163 EL Digital Signal Processing Lab Digital Load and Store: Addressing Mode Linear Addressing Mode EL 6183 EE 4163 EL Digital Signal Processing Lab Digital Load and Store: Addressing Mode Linear Addressing Mode EL 6183 EE 4163 Digital Signal Processing Lab Digital EL 6183 EE 4163 EL Digital Signal Processing Lab Digital The following DotProduct.asm Multiply two arrays. A4=0000 8000h address,B4=0000 A000h address,A6=4(size of array) .def .text DotProduct loop MV . ZERO . A7 LDW LDW NOP MPY NOP ADD SUB [A1] B NOP MV . . . . . . . DotProduct ;dot product function ;text section A6,A1 ;move loop count -->A1 ;init A7 for accumulation *A4++,A2 ;A2=(x. A4 as address pointer *B4++,B2 ;B2=(y). B4 as address pointer 4 ;4 delay slots for LDH B2,A2,A3 ;A3 = x * y ;1 delay slot for MPY A3,A7,A7 ;sum of products in A7 A1,1,A1 ;decrement loop counter loop ;branch back to loop till A1=0 5 ;5 delay slots for branch A7,A4 ;A4=result A4=return register EL 6183 EE 4163 EL Digital Signal Processing Lab Digital Address Memory 0000 8000 h 0000 8004 h 0000 8008 h 0000 800C h Content 1 2 3 4 Address Memory 0000 A000 h 0000 A004 h 0000 A008 h 0000 A00C h Content 0 2 4 6 Manual Execution as Activity 1 EL 6183 Digital Signal Processing Lab Digital Monday April 13, 2009 • Circular Addressing Mode • Pipelining • Assembly Programming Activities • Final Projects • Quiz #4 EL 6183 EL Digital Signal Processing Lab Digital Final Projects 1. 2. DTMF encoder using external keyboard and DTMF decoder DTMF encoder using the DSK onboard user switches and DTMF decoder 3. DTMF encoder using the PC keyboard (with RTDX) and DTMF decoder 4. DTMF generator using a parameter slider to select between the 12 different tones 5. Message Scrambler / descrambler using 128 bit Private keys 6. PSK Modulator / demodulator 7. Spread Spectrum Amplitude Modulator/Demodulator Using Frequency Hopping 8. FFT Implementation using Assembly Programming 9. Synthesizing the Sound of a Plucked String 10. EEG signal filtering to extract the Alfa, Beta, Theta, etc, brain waves. 11. A subject of your own. ...
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