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Electrical Engineering 145M - Spring 1996 - Derenzo - Midterm 1

Electrical Engineering 145M - Spring 1996 - Derenzo - Midterm 1

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Name (Last, First) UNIVERSITY OF CALIFORNIA College of Engineering Electrical Engineering and Computer Sciences Department EECS 145M: Microcomputer Interfacing Laboratory Spring Midterm #1 (Closed book- calculators OK) Wednesday, February 21, 1996 PROBLEM 1 (25 points) You have just tested an 8-bit D/A circuit by making measurements of its output glitches. Your measurements show that after all possible changes in input bit patterns at time t, the output glitch begins no earlier than t + 10 ns and is essentially gone after t + 30 ns. The output ranges from V 1 = 0 volts to V 255 = 2.55 volts. You decide to design and build a circuit that does the following: Uses the D/A converter, but suppresses output glitches by sensing changes in the input and using a sample and hold amplifier. Has accurate conversion at 0 Hz. You have available the following components: 1 A digital circuit that has 8 inputs and one output (normally low). If the input bits change at time t, the output goes high from (t + 5 ns) to (t + 5 ns + t d ). You can choose the value of t d . 2 A sample-and-hold amplifier with an analog input, and analog output, and a digital control line. When the control line is low, the analog output V 0 (t) is equal to the analog input V 1 (t).
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