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Unformatted text preview: 11/3/09 1 1 ECE2030 Introduction to Computer Engineering Lecture 17: Memory 2 Memory Random Access Memory (RAM) Contrary to Serial Access Memory (e.g. Tape) Static Random Access Memory (SRAM) Data stored so long as Vdd is applied 6-transistors per cell Faster Differential Dynamic Random Access Memory (DRAM) Require periodic refresh Smaller (can be implemented with 1 or 3 transistor) Slower Single-Ended Can be read and written Typically, addressable at byte granularity Read-Only Memory (ROM) 3 Block Diagram of Memory Example: 2MB memory, byte-addressable N = 8 (because of byte-addressability) K = 21 (1 word = 8-bit) 2 k words N-bit per word Memory Unit N-bit Data Input (for Write) N-bit Data Output (for Read) K-bit address lines Read/Write Chip Enable N N K 4 Static Random Access Memory (SRAM) Typically each bit is implemented with 6 transistors (6T SRAM Cell) During read, the bitline and its inverse are precharged to Vdd (1) before set WL=1 During write, put the value on Bitline and its inverse on Bitline_bar before set WL=1 BitLine BitLine Wordline (WL) 11/3/09 2 5 Dynamic Random Access Memory (DRAM)...
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This note was uploaded on 11/24/2009 for the course ENGINEERIN 4283 taught by Professor Smith during the Spring '09 term at American InterContinental University Dunwoody.
- Spring '09