lec_07_datapath_and_control_5_spr08_s1

lec_07_datapath_and_control_5_spr08_s1 - EE-449 Lec. 07of...

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Unformatted text preview: EE-449 Lec. 07of 26Lecture 7 Multicycle Datapath & ControlEE-449 Computer Organization Spring 2008Salvador FallorinaCSULAExceptions & Performance04-16-081Fallorina | CSULAEE-449 Lec. 07of 26Fallorina | CSULA2Review: Output & Next State Functions Output depends only on present state Therefore, output function = states where output is asserted (i.e. 1) Next State depends on both Present State andInputs Therefore, Next State function = Present states andInputs from branched pairsEE-449 Lec. 07of 26Review: Output & Next State FunctionsFallorina | CSULA3What is IorD? NextState9?EE-449 Lec. 07of 26Review: MicroprogrammingFallorina | CSULA4FSM: Control represented in a state diagramMicroprogramming: Control represented in a sequence of microinstructions123456789EE-449 Lec. 07of 26Review: Microprogram SequenceFallorina | CSULA5 Each line corresponds to a set of control signal. Notation is changed. Symbolic vs. binary Sequence of execution is set by Sequencing field Dispatch 1 can go to Mem1, Rformat1, BEQ1, or JUMP1 Dispatch 2 con go to LW2 or SW2123456789EE-449 Lec. 07of 26Microprogram Sequencing (R-Type)Fallorina | CSULA6FetchDispatch 1Dispatch 2Seq0100000012345678901100110EE-449 Lec. 07of 26Review: Effect of Adding Instructions1.May need to modify or add new values for one or more of the fields (and assign translation into control signals)1.Describe the microinstruction in one or more lines 1.May need to add another row to the dispatch tablesFallorina | CSULA7EE-449 Lec. 07of 26ExceptionsFallorina | CSULA8EE-449 Lec. 07of 26Exceptions and Exception HandlingDefinition: Exceptions are unexpected events that change the flow of instruction execution.Types:Interrupts (external): I/O from hardwareTimerExceptions (internal): Error conditions: arithmetic overflowundefined instructionBreakpointSystem callHardware malfunctionMemory parity errorFallorina | CSULA9EE-449 Lec. 07of 26Exception HandlingNormally, interrupts and exceptions are handled by a combination of hardware (the processor) and...
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This note was uploaded on 11/27/2009 for the course EE 454L at USC.

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lec_07_datapath_and_control_5_spr08_s1 - EE-449 Lec. 07of...

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