lec_06_datapath_and_control_4_spr08_s

lec_06_datapath_and_control_4_spr08_s - EE-449 Lec. 06of...

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Unformatted text preview: EE-449 Lec. 06of 41Lecture 6 Multicycle Datapath & ControlEE-449 Computer Organization Spring 2008Salvador FallorinaCSULA04-14-081Fallorina | CSULAEE-449 Lec. 06of 41Review: Extending the Datapath & ControlFallorina | CSULA2Instr.Op5Op4Op3Op2Op1OpRegDstALUSrcMemto-RegRegWriteMemReadMemWriteBranchALUOp1ALUOpR-format0 0111lw11 11111sw111 1X1X1beq10 0XX11Each instruction generates one set of outputs for the entire execution cycleEach instruction generates a sequence of outputs from each cycle of the executionEE-449 Lec. 06of 41Fallorina | CSULA3Instr.Op5Op4Op3Op2Op1OpRegDstALUSrcMemto-RegRegWriteMemReadMemWriteBranchALUOp1ALUOp0R-format0 0111lw11 11111sw111 1X1X1beq10 0XX11Review: Extending the Datapath & ControlEE-449 Lec. 06of 41Fallorina | CSULA4Instr.Op5Op4Op3Op2Op1OpRegDstALUSrcMemto-RegRegWriteMemReadMemWriteBranchALUOp1ALUOp0New Ctrl OutR-format0 0 01111lw10 1 11111sw110 1 1X1X11beq1 0 0XX11new111 1 111111Each new instructions add a row to the truth table (may need to add minterms to the existing output functions)Each new control signal add a column to the truth table (need new output function)New control signals may need to be added to appropriate statesNew instructions add states to the FSMNew = 0New = 1Review: Extending the Datapath & ControlEE-449 Lec. 06of 41examplesFallorina | CSULA5EE-449 Lec. 06of 41FSM Control ImplementationFallorina | CSULA6FSM DiagramPLA or ROMEE-449 Lec. 06of 41Mealy-Outputs are functions of boththe present state and inputs-The Next States are a function of both the present state and inputs- Circuit block diagram:-Notation:Moore-Outputs are functions of present state only-The Next States are a function of both the present state and inputs-Circuit block diagram:-Notation:FSM: Mealy & Moore ModelsFallorina | CSULA7Were using this modelPresent State 00Input XNext State 01Output YEE-449 Lec. 06of 41Fallorina | CSULA8Deriving Output Functions Output depends only on present state Therefore, output function = states where output is asserted (i.e. 1)Shortcut:EE-449 Lec. 06of 41Deriving Output FunctionsFallorina | CSULA9PCWrite = S3S2S1S0 + S3S2S1S0 = State0 + State9 EE-449 Lec. 06of 41Fallorina | CSULA10Deriving Output FunctionsALUSrcA = State2 + State6 + State8 EE-449 Lec. 06of 41Deriving Output FunctionsFallorina | CSULA11What is RegWrite? ALUOp1?EE-449...
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This note was uploaded on 11/27/2009 for the course EE 454L at USC.

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lec_06_datapath_and_control_4_spr08_s - EE-449 Lec. 06of...

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