34 q q clocked t flip flop pre t c clr q q t j c k pre

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Unformatted text preview: am C lo c k Q T C lo c k c ε Dt c Q T T T Q (a ) Q Q Q (b ) Figure 6.37 Summary of Latch and Flip-Flop Characteristics SE555 Precision Timing Module V R eset CC C o n tro l R T h re sh o ld C1 SE 555 R1 R S 1 Q O u tp u t R C2 T rig g e r R C o m p a ra to r Q1 G ro u n d D is c h a rg e Figure 6.38 Astable Operation of The SE555 V CC 0 .0 1 m F R 5 A 8 V CC C ont 4 7 RESET D IS C H THRES T R IG GND 1 R L R 6 B O ut 3 S q u a re w a v e 2 C SE 555 Figure 6.39 Monostable (One shot) Device Realization V CC 0 .0 1 m F R 5 A 8 VCC C ont 4 7 6 RESET D IS C H THRES T R IG R L O ut 3 O u tp u t T rig g e r 2 C SE 555 GND 1 R A 3 .3 -m s p u ls e if = 3 kO hm and C = 1 m F Figure 6.40 PROM-based Sequential Circuits In p u t x PRO M 1 PRO M 2 N ext s ta te Y R e g is te r O u tp u t z C lo c k P r e s e n t s ta te In p u t P resen t s ta te x (a ) y C o n te n ts PRO M x A d d ress y PRO M 1 Y PRO M 2 z y Y /z N e x t sta te / o u tp u t (b ) (c) Figure 6.41 PROM-based Sequential Circuit Example x y 2y 1 00 01 10 11 0 1 1 0 0 0 /1 1 /0 1 /1 0 /0 Y 2Y 1/z (a ) 0 1 0 1 0 1 0 1 /1 /1 /0 /0 1 x 0 1 2 3 y2 y1 4 5 6 7 x 0 0 0 0 1 1 1 1 y2 0 0 1 1 0 0 1 1 y1 0 1 0 1 0 1 0 1 (b ) Y 1 1 0 0 0 1 0 1 2 1 1 0 0 0 1 0 1 Y2 D Q 0 1 1 0 0 1 0 1 Y 1 1 0 1 0 1 1 0 0 z Y 0 1 1 0 0 1 0 1 1 z 1 0 1 0 1 1 0 0 C D Q C C lo c k (c) Figure 6.41 Prime Number Sequencer 256 x 8 PR O M 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 0 0 0 1 0 0 0 1 0 0 0 0 1 1 0 1 0 0 0 0 1 0 1 1 0 0 0 0 0 1 1 1 0 0 0 0 0 0 0 0 0 0 0 1 1 0 1 1 Figure 6.43 251 252 253 254 255 0 0 0 0 0 0 1 0 1D 1Q 2D 2Q 3D 3Q 4D 4Q 5D 5Q 6D 6Q 7D 7Q 8D 8Q C lo c k C lo c k SN 74273 ( 8 D flip -flo p s )...
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This note was uploaded on 12/01/2009 for the course 123 123 taught by Professor Alpha during the Spring '09 term at Georgia Institute of Technology.

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