ee101_hw6

ee101_hw6 - EE 101 Homework 6 Fall 07 Redekopp Name: _ Due:...

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1 EE 101 Homework 6 Fall ’07 Redekopp Name: _________________________________________ Lecture 9:30 / 12:30 / 2:00 Due: Tues. Oct. 23 rd in class Score: ________ Show work to get full credit. Remember, use on only one side of the paper and staple them together. Only use a calculator to CHECK your work, not to DO your work. 1. (10 pts.) Build an equivalent full-adder using two half-adders as building blocks along with a minimal number of additional gate(s) if needed. 2. (10 pts.) Using half-adders and full-adders design a circuit that takes in a 5-bit unsigned number, X (X 4 ..X 0 ) and produces an output equal to X + 21 10 . Your design should minimize the area required (i.e. use half-adders where possible.) 3. (20 pts.) Design a circuit that takes in four 4-bit unsigned numbers, A (A 3 ..A 0 ), B (B 3 ..B 0 ), C (C 3 ..C 0 ), and D (D 3 ..D 0 ) and produces the 6-bit unsigned sum of those numbers. You should use three 4-bit adder blocks (74LS283’s), and a minimal number of full adders or half adders. You should organize your adder circuits to
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ee101_hw6 - EE 101 Homework 6 Fall 07 Redekopp Name: _ Due:...

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