lec01 - Introduction to Computer Introduction Organization...

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Unformatted text preview: Introduction to Computer Introduction Organization Organization CDA 3101 Instructor: Dr. Seema Bandyopadhyay 1 Contact Information My Office: CSE Building, Room E508 Email: use WebCT to send emails Phone: 352 392 9598 Office Hours: Friday, 10:30 am – 12:30 pm 2 Contact Information Teaching Assistants Fei Xu ([email protected]) Office: CSE E309 Office hours: Mon. 4-5 (10:40am-12:35pm) Wed. 2-3 (8:30am – 10:30 am) David Lin ([email protected]) David Office: CSE E309 Office hours: Tue. 8-9 (3:00 – 5:00 pm) 3 Schedule Lecture: Tues (2-3), Thurs (3) Discussion: Wed 3-5 Wed. 3rd period (9:35-10:25am) in RNK 0215 Wed. 4th period (10:40-11:30am) in MAT 0118 Wed. 5th period (11:45am-12:35pm) in MAT 0007 Please attend the discussion session you Please are registered for! are 4 Textbooks Required Patterson, David A. and Hennessy, John L. Patterson, Computer Organization and Design. 3rd ed. Computer 3rd Morgan Kaufmann Publishers, San Francisco, CA. ISBN: 1-55860-604-1. CA. Britton, Robert L. MIPS Assembly Language Britton, Programming. Pearson Prentice Hall, Upper Programming Pearson Saddle River, NJ. ISBN: 0-13-142044-5. Saddle 5 Recommended Other Details Official Prerequisites: Official CIS 3020 or CIS 3023 (Prog. Fundamentals) MAC 2233 (Survey of Calculus 1), MAC 2311 MAC (Analytic Geometry and Calculus 1) or MAC 3472 (Honors Calculus 1) 6 Grading Exam 1 (in-class): 20% Exam 2 (in-class): 20% Final Exam (Comprehensive): 30% Quizzes: 10% Assignments: 20% A: 90 or above, B+: 87-89, B:80-86, C+:77-79, A: C: 70-76, D+:67-69, D:60-66, E: 59 or below 7 Course Policies WebCT: Please check WebCT regularly for any new information. new Email: Email is the best way to contact me. Please use WebCT to send me emails. Please Please check your WebCT emails often for any Please important information about the course. important Electronic Devices: Laptops, PDAs, and other mobile computing devices must be turned off during lectures and tests. Ringer on your cell phone must be turned off before coming to class and absolutely no phone calls during the class. and 8 Course Policies Missed Lectures: You are responsible for obtaining information provided during missed lectures from other students in the course. students Makeup Exams: No makeup exams will be given except for medical reasons with written documentation. for Makeup Quizzes: No makeup quizzes will be given. Late Assignments: Assignments must be turned in at the beginning of class on the Assignments assigned day. assigned 10% penalty for assignments turned one day within the due date 10% and time. 25% penalty for assignments turned two days within the due 25% date and time. No assignment will be accepted after two days. 9 What is this course about? What It is all about how computers work! But what do we mean by a computer? Different types: desktop, servers, supercomputers, Different embedded systems, smart dust embedded Different manufacturers: Intel, Apple, IBM, Microsoft, Different Sun… Sun… Different underlying technologies and different costs! But they are all, at heart, rapid calculation But Components of a Computer Processor Control Datapath Devices Memory Input Output 11 11 Computer Operation Processor Control Datapath 000000 000000 100011 100011 101011 101011 000000 Memory 00000 00100 00010 00010 00010 00010 11111 00101 00010 01111 10000 10000 01111 00000 0001000010000000 0001000000100000 0000000000000000 0000000000000100 0000000000000000 0000000000000100 0000000000001000 Devices Input Output 12 12 Input Device Inputs Code 000000 000000 100011 100011 101011 101011 000000 00000 00100 00010 00010 00010 00010 11111 00101 00010 01111 10000 10000 01111 00000 0001000010000000 0001000000100000 0000000000000000 0000000000000100 0000000000000000 0000000000000100 0000000000001000 Processor Control Datapath Devices Memory Input Output 13 13 Code Stored in Memory Processor Control Datapath 000000 000000 100011 100011 101011 101011 000000 Memory 00000 00100 00010 00010 00010 00010 11111 00101 00010 01111 10000 10000 01111 00000 0001000010000000 0001000000100000 0000000000000000 0000000000000100 0000000000000000 0000000000000100 0000000000001000 Devices Input Output 14 14 Processor Fetches an Instruction Processor fetches an instruction from memory Instruction Processor Control Datapath 000000 000000 100011 100011 101011 101011 000000 Memory 00000 00100 00010 00010 00010 00010 11111 00101 00010 01111 10000 10000 01111 00000 0001000010000000 0001000000100000 0000000000000000 0000000000000100 0000000000000000 0000000000000100 0000000000001000 Devices Input Output Where does it fetch from? 15 15 Control Decodes the Control decodes the instruction to determine Instruction Instruction what to execute Processor Control 000000 00100 00010 0001000000100000 Devices Memory Input Output Datapath 16 16 Datapath Executes the Datapath Instruction Instruction Datapath executes the instruction as directed by control Processor Control 000000 00100 00010 0001000000100000 Devices Memory Input Output Datapath contents Reg #4 ADD contents Reg #2 results put in Reg #2 17 17 Processor Organization Control needs to have the Ability to input instructions from memory Logic and means to control instruction sequencing Logic and means to issue signals that control the way Logic information flows between datapath components information Logic and means to control what operations the datapath’s Logic functional units perform functional Components - functional units (e.g., adder) and storage Components locations (e.g., register file) - needed to execute instructions instructions Components interconnected so that the instructions can Components be accomplished be Where does it load and store from and to? Ability to load data from and store data to memory memory 18 18 Datapath needs to have the Processor Control Datapath What Happens What Next? NMemory ext? 000000 000000 100011 100011 101011 101011 000000 00000 00100 00010 00010 00010 00010 11111 00101 00010 01111 10000 10000 01111 00000 0001000010000000 0001000000100000 0000000000000000 0000000000000100 0000000000000000 0000000000000100 0000000000001000 Devices Input Output 19 19 What Happens What Next? Next? Memory Processor Control Datapath 000000 000000 100011 100011 101011 101011 000000 00000 00100 00010 00010 00010 00010 11111 00101 00010 01111 10000 10000 01111 00000 0001000010000000 0001000000100000 0000000000000000 0000000000000100 0000000000000000 0000000000000100 0000000000001000 Devices Input Output Fetch Exec Decode 20 20 Output Data Stored in Output Memory Memory At program completion the data to be output resides in memory Memory Processor Control Datapath 00000100010100000000000000000000 00000000010011110000000000000100 00000011111000000000000000001000 Devices Input Output 21 21 Output Device Outputs Output Data Data Processor Control Datapath Devices Memory Input Output 00000100010100000000000000000000 00000000010011110000000000000100 00000011111000000000000000001000 22 22 What is the language of the code? Machine language Assembly Language High-level language 23 23 Advantages of Higher-Level Advantages Languages Languages Higher-level languages Allow the programmer to think in a more natural language Improve programmer productivity – more understandable code that is easier to debug and validate Improve program maintainability Allow programmers to be independent of the computer on which they are developed (compilers and assemblers can translate high-level language programs to the binary instructions of any machine) Emergence of optimizing compilers that produce very efficient assembly code optimized for the target machine As a result, very little programming is done today at the As assembler level assembler 24 24 Below the Program High-level language program (in C) swap (int v, int k) (int temp; temp = v[k]; v[k] = v[k+1]; v[k+1] = temp;) C compiler Assembly language program (for MIPS) swap: sll add lw lw sw sw jr $2, $5, 2 $2, $4,$2 $15, 0($2) $16, 4($2) $16, 0($2) $15, 4($2) $31 00101 00010 0001000010000000 0001000000100000 assembler Machine (object) code (for MIPS) 000000 000000 000000 000000 ... 00000 00100 25 25 What happens next? 000000 000000 100011 100011 101011 101011 000000 00000 00100 00010 00010 00010 00010 11111 00101 00010 01111 10000 10000 01111 00000 0001000010000000 0001000000100000 0000000000000000 0000000000000100 0000000000000000 0000000000000100 0000000000001000 Processor Control Datapath Devices Memory Input Output 26 26 What Happens What Next? Next? Memory Processor Control Datapath 000000 000000 100011 100011 101011 101011 000000 00000 00100 00010 00010 00010 00010 11111 00101 00010 01111 10000 10000 01111 00000 0001000010000000 0001000000100000 0000000000000000 0000000000000100 0000000000000000 0000000000000100 0000000000001000 Devices Input Output Fetch Exec Decode 27 27 Objectives of a program Achieve certain tasks Achieve these tasks fast 28 28 What affects program What performance? performance? Both software and hardware Algorithm determines number of source-level statements Language/Compiler/Architecture determine no. of machine Language/Compiler/Architecture instructions for each source-level statement instructions (Chapter 2 and 3) Processor/Memory determine how fast instructions can be Processor/Memory executed executed (Chapter 5, 6, and 7) I/O systems determine how fast I/O operations may be executed (Chapter 8) (Chapter 29 29 Course Objectives Introduction to major components of a computer system Introduction and how they function together in executing a program. and We will answer the following questions: How programs written in high-level languages are translated into How the language of the hardware, and how does the hardware execute the resulting program? What is the interface between software and hardware, and how What does the software instruct the hardware to perform the needed functions? functions? What determines the performance of a program, and how a What programmer can improve the performance? programmer What techniques can be used by hardware designers to improve What performance? performance? 30 30 Detailed Course Outline Chapter 1: computer abstractions and Chapter technologies technologies Chapter 2-3, Appendix A : MIPS Assembly Chapter Language Language Chapter 4: assessing and understanding Chapter performance performance Appendix B: logic design Chapter 5: the processor: datapath and control Chapter 6: enhancing performance with pipelining Chapter 7: large and fast: exploiting memory Chapter hierarchy 31 31 Why learn all this? Makes it possible to write computer programs that are: Faster Smaller Less prone to errors Allows programmers to appreciate relative cost of operations and the effect of programming choices 32 32 Assignment Read Chapter 1. 33 33 ...
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This note was uploaded on 12/02/2009 for the course CDA 3101 taught by Professor Small during the Spring '08 term at University of Florida.

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