# solutions-app-e - 1 Solutions to Exercises for Appendix E...

This preview shows pages 1–3. Sign up to view the full content.

1 Solutions to Exercises for Appendix E in Computer Architecture: A Quantitative Approach, 4th Edition c c Wai Hong Ho and Timothy Mark Pinkston SMART Interconnects Group University of Southern California E-1 Refer to “Computer Architecture: A Quantitative Approach (3rd Edition)” Chapter 8 solutions for Problem 8.9. E-2 Refer to “Computer Architecture: A Quantitative Approach (3rd Edition)” Chapter 8 solutions for Problem 8.10. E-3 Refer to “Computer Architecture: A Quantitative Approach (3rd Edition)” Chapter 8 solutions for Problem 8.11. E-4 Refer to “Computer Architecture: A Quantitative Approach (3rd Edition)” Chapter 8 solutions for Problem 8.12. E-5 Refer to “Computer Architecture: A Quantitative Approach (3rd Edition)” Chapter 8 solutions for Problem 8.13. E-6 Refer to “Computer Architecture: A Quantitative Approach (3rd Edition)” Chapter 8 solutions for Problem 8.1. E-7 Refer to “Computer Architecture: A Quantitative Approach (3rd Edition)” Chapter 8 solutions for Problem 8.2. E-8 Refer to “Computer Architecture: A Quantitative Approach (3rd Edition)” Chapter 8 solutions for Problem 8.3. E-9 Refer to “Computer Architecture: A Quantitative Approach (3rd Edition)” Chapter 8 solutions for Problem 8.4. E-10 Refer to “Computer Architecture: A Quantitative Approach (3rd Edition)” Chapter 8 solutions for Problem 8.18. E-11 At each stage of an Omega network, the address of the output port is equal to the address of the input port shifted left by one bit with the lowest order bit replaced by a bit from destination address, starting from highest order bit for the first stage, and so on. Therefore, the output ports at each stage can be obtained by constructing a sliding window of width n across the concatenated source and destination address. Conflicts occur if the addresses of output ports

This preview has intentionally blurred sections. Sign up to view the full version.

View Full Document
Source Destination 0 0 0 0 0 0 0 0 1 1 0 0 0 1 0 0 1 0 0 1 1 1 1 0 1 0 0 0 0 1 1 0 1 1 0 1 1 1 0 0 1 1 1 1 1 1 1 1 (a) Source Destination 0 0 0 0 0 0 0 0 1 1 0 0 0 1 0 0 1 0 0 1 1 1 1 0 1 0 0 0 0 1 1 0 1 1 0 1 1 1 0 0 1 1 1 1 1 1 1 1 (b) Fig. 1. Sliding windows showing the output ports required at: (a) the first, and (b) second stage of an Omega network for the bit-reversal permutation. as identified by the sliding windows are not unique in any of the stages. It can be easily seen that for any permutation communication patterns where destination addresses are unique, there can be no conflicts at the third stage. Thus, we need to consider conflicts only in the first and second stages. a. Bit-reversal permutation reverses the order of the bits. For an 8-node network, node with address a 2 ,a 1 ,a 0 sends to node with addresss a 0 ,a 1 ,a 2 . Figure 1 shows the sliding windows for the source and destination addresses. There are conflicts in both the first and second stages as indicated in the figure. Therefore, the permutation pattern can not be realized using the Omega network. b. For the perfect shuffle permutation, input with address
This is the end of the preview. Sign up to access the rest of the document.

## This note was uploaded on 12/03/2009 for the course COMPUTER E 770 taught by Professor Dr.mohammednizari during the Spring '09 term at Jordan University of Science & Tech.

### Page1 / 28

solutions-app-e - 1 Solutions to Exercises for Appendix E...

This preview shows document pages 1 - 3. Sign up to view the full document.

View Full Document
Ask a homework question - tutors are online