Homework07_key - CS/ECE 3810 Solutions Homework #7 Fall...

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Solutions – Homework #7 Fall 2009 1. Determine control lines: Instruction RegDst Branch MemRead MemtoReg ALUOp MemWrite ALUSrc RegWrite sub Rd, Rs, Rt 1 0 0 0 Sub 0 0 1 addi Rt, Rs, imm 0 0 0 0 Add 0 1 1 lw Rt, offst(Rs) 0 0 1 1 Add 0 1 1 sw Rt, offst(Rs) X 0 0 X Add 1 1 0 beq Rs, Rt, offst X 1 0 X Sub 0 0 0 In reviewing my posted homework, it looks like I made one further mistake in that I show Rs as a destination register for addi . I have fixed this on the key, and it should not alter the problem solution. 2. Add jal instruction: I cut-and-pasted the processor diagram to create the diagram on the next page. Specifically I did the following: ° I expanded the MUX controlled by RegDst to have one more input. This way, I can specify a destination register of 31 (which is $ra). This means that the control line RegDst must now be two bits wide. ° I added a new MUX to select between the current PC+4 (or branch) and the jal address. Note that the jal address is formed from an immediate and from the highest bits of the PC. I had to add a control line that I labeled ‘Jump’. ° I expanded the MemToReg MUX to allow the PC to also be written to a register (specifically, register 31). This means that the MemToReg control line is also two bits wide. I also routed PC + 4 to this MUX. The control lines for the instruction would be:
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Homework07_key - CS/ECE 3810 Solutions Homework #7 Fall...

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