L15-ac-intro-sds-state1

L15-ac-intro-sds-state1 - inst.eecs.berkeley.edu/~cs61c...

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CS61C L15 Intro to SDS, State Elements I (1) Chae, Summer 2008 © UCB Albert Chae, Instructor inst.eecs.berkeley.edu/~cs61c CS61C : Machine Structures Lecture #15 – Intro to Synchronous Digital Systems, State Elements I 2008-7-16 Go BEARS~
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CS61C L15 Intro to SDS, State Elements I (2) Chae, Summer 2008 © UCB 61C What are “Machine Structures”? Coordination of many levels of abstraction I/O system Processor Compiler Operating System (MacOS X) Application (Netscape) Digital Design Circuit Design Instruction Set Architecture Datapath & Control transistors Memory Hardware Software Assembler ISA is an important abstraction level: contract between HW & SW
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CS61C L15 Intro to SDS, State Elements I (3) Chae, Summer 2008 © UCB Below the Program High-level language program (in C) swap int v[], int k){ int temp; temp = v[k]; v[k] = v[k+1]; v[k+1] = temp; } Assembly language program (for MIPS) swap: sll $2, $5, 2 add $2, $4,$2 lw $15, 0($2) lw $16, 4($2) sw $16, 0($2) sw $15, 4($2) jr $31 Machine (object) code (for MIPS) 000000 00000 00101 0001000010000000 000000 00100 00010 0001000000100000 . . . C compiler assembler
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CS61C L15 Intro to SDS, State Elements I (4) Chae, Summer 2008 © UCB 61C Levels of Representation lw $t0, 0($2) lw $t1, 4($2) sw $t1, 0($2) sw $t0, 4($2) High Level Language Program (e.g., C) Assembly Language Program (e.g.,MIPS) Machine Language Program (MIPS) Hardware Architecture Description (Logic, Logisim, etc.) Compiler Assembler Machine Interpretation temp = v[k]; v[k] = v[k+1]; v[k+1] = temp; 0000 1001 1100 0110 1010 1111 0101 1000 1010 1111 0101 1000 0000 1001 1100 0110 1100 0110 1010 1111 0101 1000 0000 1001 0101 1000 0000 1001 1100 0110 1010 1111 Logic Circuit Description (Logisim, etc.) Architecture Implementation
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CS61C L15 Intro to SDS, State Elements I (5) Chae, Summer 2008 © UCB Synchronous Digital Systems Synchronous: Means all operations are coordinated by a central clock . - It keeps the “heartbeat” of the system! Digital: Mean all values are represented by discrete values Electrical signals are treated as 1’s and 0’s and grouped together to form words. The hardware of a processor, such as the MIPS, is an example of a Synchronous Digital System
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CS61C L15 Intro to SDS, State Elements I (6) Chae, Summer 2008 © UCB Logic Design Next 4 weeks: we’ll study how a modern processor is built; starting with basic elements as building blocks. Why study hardware design? Understand capabilities and limitations of hardware in general and processors in particular. What processors can do fast and what they can’t do fast (avoid slow things if you want your code to run fast!) Background for more detailed hardware courses (CS 150, CS 152, EE 192) There is just so much you can do with processors. At some point you may need to design your own custom hardware.
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CS61C L15 Intro to SDS, State Elements I (7) Chae, Summer 2008 © UCB PowerPC Die Photograph Let’s look closer…
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L15-ac-intro-sds-state1 - inst.eecs.berkeley.edu/~cs61c...

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