02_Digital_Logic_Gates_And_Sequential

# 02_Digital_Logic_Gates_And_Sequential - Digital Logic...

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Textbook Chapter 3 Digital Logic: Boolean Algebra and Gates

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CMPE12 – Summer 2009 02-2 Basic Logic Gates XOR
CMPE12 – Summer 2009 02-3 Truth Table The most basic representation of a logic function Lists the output for all possible input combinations How many rows of the truth table needed? Can get big very fast 2 #inputs X Y … A B … Outputs Inputs

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CMPE12 – Summer 2009 02-4 Truth Table: Inverter Inverted signals are denoted with an overbar Or with a prime symbol A‟ Input Output A Y = A‟
CMPE12 – Summer 2009 02-5 Truth Table: AND Gate The result of an AND operation is 1 if and only if all inputs are 1 Depict AND by the multiplication symbol A·B Or by lumping the signals together AB We don‟t really build these gates… Inputs Output A B Y = A · B

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CMPE12 – Summer 2009 02-6 Truth Table: OR Gate The result of an OR operation is 1 if and only if any inputs are 1 Depict OR by the addition symbol A+B Inputs Output A B Y = A + B
CMPE12 – Summer 2009 02-7 Sum of Products How do you get from a truth table to a logic expression? Sum of products is standard way of synthesizing simple circuits Procedure: 1. Find the rows with the „1‟ output 2. Write the product-form expression for the inputs in that row (0=inverted, 1=normal) 3. Combine the products in step 2 into a sum (OR the results of step 2)

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CMPE12 – Summer 2009 02-8 Sum of Products XOR Gate 1. Find the rows with the „1‟ output 2. Write the product-form expression for the inputs in that row (0=inverted, 1=normal) 3. Combine the products in step 2 into a sum (OR the results of step 2) A B Y 0 0 0 0 1 1 1 0 1 1 1 0
CMPE12 – Summer 2009 02-9 Product of Sums Procedure: 1. Find the rows with the „0‟ output 2. Write the sum-form expression for the inputs in that row (0=normal, 1=inverted) 3. Combine the sums in step 2 into a product (AND the results of step 2) Note: we treat 0 and 1 reverse than for SoP

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CMPE12 – Summer 2009 02-10 Examples of SoP and PoS
02-11 De Morgan’s Laws

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## This note was uploaded on 12/14/2009 for the course CMPE 12/l taught by Professor Bazeghi during the Fall '09 term at UCSC.

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02_Digital_Logic_Gates_And_Sequential - Digital Logic...

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