Lab3 - Lab 3: Memories Worth 50 points Due by Friday,...

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Lab 3: Memories Worth 50 points Due by Friday, October 16 th by midnight (demo in lab) Lab Objective: You now have had a chance to play around with some basic logic combinational circuits. Let’s move on to something a little more interesting, sequential logic. From class you learned that combinational logic is just a function of current inputs and that sequential logic was a function not only of current input, but some past sequence of inputs. To store that past sequence information we need some storage devices. In this 2 part lab you will look into the basic storage element used in the LC-3, the D-latch, and modify it to support a reset signal. You will then design and build some logic that will allow you to read and write some registers. Part A: The basic storage element In this part you will modify the D-latch example in Multimedia Logic to support an asynchronous reset signal. Asynchronous means that it does not need to be qualified with the clock. Thus the reset should set the “Q” to 0 and the “QN” to 1 whenever it goes HIGH. Start by playing with the D-Latch file in examples\Basic\DLFF.LGI. Notice how the “Q” and “Not Q” outputs only change to reflect what
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This note was uploaded on 12/14/2009 for the course CMPE 12/l taught by Professor Bazeghi during the Fall '09 term at UCSC.

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Lab3 - Lab 3: Memories Worth 50 points Due by Friday,...

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