CMOS_INVERTER - ECE 6130/4130: Advance VLSI Systems Fall...

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1 ECE 6130/4130: ECE 6130/4130: Advance VLSI Systems Advance VLSI Systems Fall 2009 Fall 2009 CMOS Inverter CMOS Inverter Prof. Saibal Mukhopadhyay School of Electrical & Computer Engineering Georgia Institute of Technology
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2 Goals Goals ± Steady-state or DC-operation ² Robustness and noise tolerance ± Switching characteristics of inverter ² Performance ± Power dissipation in inverter ² Energy-efficiency
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3 Reading Materials Reading Materials ± Chapter 7: Introduction to VLSI Circuits and Systems , Uyemura, ± Chapter 5: Digital Integrated Circuits: A Design Perspectives, J. M. Rabaey, A. Chandrakasan, B. Nikolic ± Lecture notes (posted in T-square, under “Resources/Lecture Slides”)
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4 The CMOS inverter circuit The CMOS inverter circuit Low Input High Input () : 0; : thp p p ox p p thn n n ox n n PFET VC W L NFET W L βμ <= >=
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5 CMOS Inverter: First CMOS Inverter: First - - Order DC Analysis Order DC Analysis Low output level: V OL = 0 High output level: V OH = V DD V DD V DD V in = V DD V in = 0 V out V out R n R p
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6 First First - - order Analysis order Analysis ± Rail-to-rail voltage swing ± Logic levels are independent of device sizes – ratioless logic ± Low-impedance path to VDD or GND ± Infinite input impedance – infinite drivability ± No direct path between VDD and GND in steady state
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7 Voltage Transfer Characteristics Voltage Transfer Characteristics : :, gsn in dsn out gsp DD in dsp DD out Voltage Conditions NFET V V V V PFET V V V V V V == =− () : ,, NFET gsn dsn thn PFET gsp dsp thp DC Characteristics IV V V V V = Key: Need to determine the operating region of NFET and PFET for different input and output voltage Use the operating regions and the corresponding current equations to construct VTC
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8 CMOS Inverter VTC: NFET Regions CMOS Inverter VTC: NFET Regions V out V in 0.5 1 1.5 2 2.5 0.5 1 1.5 22 . 5 NMOS off NMOS sat NMOS linear V in =V thn Assume V thn =0.5 V out = V in -|V thn |
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9 CMOS Inverter VTC: PFET Regions CMOS Inverter VTC: PFET Regions V out V in 0.5 1 1.5 2 2.5 0.5 1 1.5 22 . 5 PMOS off PMOS sat PMOS linear V in =V DD -|V thp | Assume V thp =-0.5 V out < V in +|V thp | V dsp > V DD –V in –|V thp | V dsp > V gsp thp | V dsp =V DD -V out V out = V in +|V thp |
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10 Voltage Transfer Characteristics Voltage Transfer Characteristics :, ~ : in thn out DD in thn out in thn in thn out in thn NFET Regions cut off V V V V saturation V V V V V linear V V V V V −< >> >< ~ 0 in DD thp DD out DD in thp in DD thp DD out DD in thp in DD thp out PFET Regions linear V V V V V V V V saturation V V V V V V V V cut off V V V V <− >− −>
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11 CMOS Inverter VTC CMOS Inverter VTC V out V in 0.5 1 1.5 2 2.5 0.5 1 1.5 2 2. 5 NMOS linear PMOS off NMOS sat PMOS sat NMOS off PMOS linear NMOS sat PMOS linear NMOS linear PMOS sat V in =V thn V in =V DD -|V thp | Assume V thn =0.5 V thp =-0.5 V out = V in +|V thp | V out = V in thn | V in =V out =V M
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12 1. ‘a’ and ‘b’ are gain=1 points 2. V IL = Input low level, V IH = Input high level 3.
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This note was uploaded on 12/14/2009 for the course ECE 6130 taught by Professor Staff during the Fall '08 term at Georgia Institute of Technology.

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CMOS_INVERTER - ECE 6130/4130: Advance VLSI Systems Fall...

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