L3 - Karnaugh Maps & Combinational Logic Design

L3 - Karnaugh Maps & Combinational Logic Design -...

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1 Karnaugh Maps & Combinational Logic Design ECE 152A – Summer 2009 June 29, 2009 ECE 152A - Digital Design Principles 2 Reading Assignment s Brown and Vranesic b 4 Optimized Implementation of Logic Functions s 4.1 Karnaugh Map s 4.2 Strategy for Minimization b 4.2.1 Terminology b 4.2.2 Minimization Procedure s 4.3 Minimization of Product-of-Sums Forms s 4.4 Incompletely Specified Functions s 4.8 Cubical Representation b 4.8.1 Cubes and Hypercubes
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2 June 29, 2009 ECE 152A - Digital Design Principles 3 Reading Assignment s Roth b 1 Introduction Number Systems and Conversion s 1.4 Representation of Negative Numbers s 1.5 Binary Codes b 4 Applications of Boolean Algebra Minterm and Maxterm Expansions s 4.5 Incompletely Specified Functions June 29, 2009 ECE 152A - Digital Design Principles 4 Reading Assignment s Roth (cont) b 5 Karnaugh Maps s 5.1 Minimum Forms of Switching Functions s 5.2 Two- and Three-Variable Karnaugh Maps s 5.3 Four-Variable Karnaugh Maps s 5.4 Determination of Minimum Expressions Using Essential Prime Implicants s 5.5 Five-Variable Karnaugh Maps
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3 June 29, 2009 ECE 152A - Digital Design Principles 5 Canonical Forms s The canonical Sum-of-Products (SOP) and Product-of-Sums (POS) forms can be derived directly from the truth table but are (by definition) not simplified b Canonical SOP and POS forms are “highest cost”, two-level realization of the logic function b The goal of simplification and minimization is to derive a lower cost but equivalent logic function June 29, 2009 ECE 152A - Digital Design Principles 6 Simplification s Reduce cost of implementation by reducing the number of literals and product (or sum) terms b Literals correspond to gate inputs and hence both wires and the size (fan-in) of the first level gates in a two-level implementation b Product (Sum) terms correspond to the number of gates in the first level of a two-level implementation and the size (fan-in) of the second level gate
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4 June 29, 2009 ECE 152A - Digital Design Principles 7 Simplification s Algebraic Simplification b Using theorems and properties of Boolean Algebra s Difficult with large number of variables and complex Boolean expressions s Most often incorporated into CAD Tools s Karnaugh Maps b Graphical representation of logic function suitable for manual simplification and minimization June 29, 2009 ECE 152A - Digital Design Principles 8 Two-Variable Karnaugh Map s Location of minterms and maxterms on a two-variable map b Index is the same, expansion is complementary 0 1 0 1 m 0 m 1 m 2 m 3 A B 0 1 0 1 M 0 M 1 M 2 M 3 A B
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5 June 29, 2009 ECE 152A - Digital Design Principles 9 Two-Variable Karnaugh Map s Simplification using xy + xy’ = x and x + x’y = x + y b F= Σ m (0,2,3) 0 1 0 1 0 1 A B 1 1 F = A’B’ + AB’ + AB F = B’ (A’ + A) + AB F = B’ + AB F = (B’ + A) (B’ + B) F = B’ + A June 29, 2009 ECE 152A - Digital Design Principles 10 Three-Variable Karnaugh Map s Location of three-variable minterms 0 1 00 01 A BC 11 10 m 4 m 5 m 7 m 2 m 3 m 1 m 0 m 6
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This note was uploaded on 12/18/2009 for the course ECE 152a taught by Professor Johnson during the Spring '07 term at UCSB.

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L3 - Karnaugh Maps & Combinational Logic Design -...

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