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L4 - Propagation Delay, Circuit Timing & Adder Design

L4 - Propagation Delay, Circuit Timing & Adder Design

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1 Propagation Delay, Circuit Timing & Adder Design ECE 152A – Summer 2009 July 6, 2009 ECE 152A - Digital Design Principles 2 Reading Assignment square6 Brown and Vranesic boxshadowdwn 2 Introduction to Logic Circuits square6 2.9 Introduction to CAD Tools boxshadowdwn 2.9.1 Design Entry boxshadowdwn 2.9.2 Synthesis boxshadowdwn 2.9.3 Functional Simulation boxshadowdwn 2.9.4 Physical Design (2 nd edition) boxshadowdwn 2.9.5 Timing Simulation (2 nd edition) boxshadowdwn 2.9.4 Summary (1 st edition)
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2 July 6, 2009 ECE 152A - Digital Design Principles 3 Reading Assignment square6 Brown and Vranesic (cont) boxshadowdwn 3 Implementation Technology boxshadowdwn 3.3.1 Speed of Logic Circuits square6 3.5 Standard Chips boxshadowdwn 3.5.1 7400-Series Standard Chips square6 3.8 Practical Aspects boxshadowdwn 3.8.3 Voltage Levels in Logic Gates boxshadowdwn 3.8.4 Noise Margin boxshadowdwn 3.8.5 Dynamic Operation of Logic Gates boxshadowdwn 3.8.6 Power Dissipation in Logic Gates July 6, 2009 ECE 152A - Digital Design Principles 4 Reading Assignment square6 Brown and Vranesic (cont) boxshadowdwn 5 Number Representation and Arithmetic Circuits square6 5.1 Positional Number Representation boxshadowdwn 5.1.1 Unsigned Numbers boxshadowdwn 5.1.2 Conversion Between Decimal and Binary Systems boxshadowdwn 5.1.3 Octal and Hexadecimal Representations square6 5.2 Addition of Unsigned Numbers boxshadowdwn 5.2.1 Decomposed Full-Adder boxshadowdwn 5.2.2 Ripple-Carry Adder boxshadowdwn 5.2.3 Design Example
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3 July 6, 2009 ECE 152A - Digital Design Principles 5 Reading Assignment square6 Roth boxshadowdwn 1 Introduction Number Systems and Conversion square6 1.2 Number Systems and Conversion square6 1.3 Binary Arithmetic boxshadowdwn 8 Combinational Circuit Design and Simulation Using Gates square6 8.3 Gate Delays and Timing Diagrams July 6, 2009 ECE 152A - Digital Design Principles 6 Properties of Digital Integrated Circuits square6 The Ideal Digital Circuit
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4 July 6, 2009 ECE 152A - Digital Design Principles 7 Digital IC Definitions square6 Amplitude and Voltage Transfer Characteristics July 6, 2009 ECE 152A - Digital Design Principles 8 Digital IC Definitions square6 Noise Margins boxshadowdwn Sources of noise boxshadowdwn Definition of noise margins
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5 July 6, 2009 ECE 152A - Digital Design Principles 9 Propagation Delay square6 When gate inputs change, outputs don’t change instantaneously boxshadowdwn This delay is known as “gate” or “propagation” delay PLH PHL t t = = 2 1 ε ε July 6, 2009 ECE 152A - Digital Design Principles 10 Propagation Delay boxshadowdwn ε 1 is the propagation delay from input going high to output going low (inverting logic) square6 t PHL boxshadowdwn ε 2 is the propagation delay from input going low to output going high (inverting logic) square6 t PLH boxshadowdwn Terminology ( t PHL and t PLH ) always refers to the transition on the output (whether circuit is inverting or not)
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6 July 6, 2009 ECE 152A - Digital Design Principles 11 Propagation Delay square6 Multiple Gate Delays boxshadowdwn Example assumes that t PLH and t PHL equal 20 ns for both AND and NOR gate square6
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