L11 - RAM & ROM Based Digital Design

L11 - RAM & ROM Based Digital Design - RAM &...

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1 RAM & ROM Based Digital Design ECE 152A – Summer 2009 August 12, 2009 ECE 152A - Digital Design Principles 2 Reading Assignment s Brown and Vranesic b 10 Digital System Design s 10.1 Building Block Circuits b 10.1.3 Static Random Access Memory (SRAM) b 10.1.4 SRAM Blocks in PLDs
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2 August 12, 2009 ECE 152A - Digital Design Principles 3 Reading Assignment s Roth b 9 Multiplexers, Decoders, and Programmable Logic Devices s 9.5 Read Only Memories August 12, 2009 ECE 152A - Digital Design Principles 4 Read/Write Memories s RAM b Random Access Memory s Same access time to all memory locations b As opposed to serial access memory s About the same time for read and write b SRAM s Static Random Access Memory b Built with cross coupled inverters and pass transistors
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3 August 12, 2009 ECE 152A - Digital Design Principles 5 Read/Write Memories s 6T SRAM Cell b CMOS implementation with pass transistors b Sense amp at bottom of column August 12, 2009 ECE 152A - Digital Design Principles 6 Read/Write Memories s RAM Blocks and Register Files
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4 August 12, 2009 ECE 152A - Digital Design Principles 7 Read/Write Memories s RAM (cont) b DRAM s Uses capacitance on MOSFET gate s Must be “refreshed” periodically b Restore charge on gate capacitance b Accomplished by reading or writing to memory location August 12, 2009 ECE 152A - Digital Design Principles 8 Read/Write Memories s RAM (cont) b Both SRAM and DRAM are “volatile” s Data lost when power is removed b DRAM has approximately 4 times the capacity of SRAM s Basic memory cell of DRAM is smaller b ~2 transistors vs. 6 b SRAM is generally faster
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L11 - RAM & ROM Based Digital Design - RAM &...

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