20090910 - Computer Architecture for Multiprogramming Goal:...

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Computer Architecture for Multiprogramming Goal: Review typical hardware features in a modern com- puter, which are used to support multiprogramming.
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Bus Architecture
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CPU State General purpose registers . Program counter (PC). Stack pointer (SP). Processor status register (PS). MMU control registers . This information must be saved and restored in a context switch.
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Hardware-Supported Stack Used automatically for saving CPU state during subroutine calls and interrupt service . The SP register points to the ”top” of the stack. Special call/return and save/restore instructions make it convenient and efficient to access stack.
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Stack
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Interrupts Interrupts are a mechanism for causing the CPU to suspend its current computation and take up some new task. Control returns to the original task at some later time. Uses of interrupts: Control of asynchronous I/O devices. CPU scheduling (preemption of current process).
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Traps A trap is a kind of interrupt that is generated as a result of instruction execution. Uses: Handling exceptional conditions arising during execution ( e.g. divison by zero, page fault, illegal instruction). Generating requests for OS services (system calls). Traps are synchronous interrupts.
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1. Interrupt is requested: by I/O device asserting IRQ line. by the occurrence of an exceptional condition. 2. CPU checks for interrupt requests: upon completion of current instruction (for asynchronous interrupts). when an exceptional condition occurs
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This note was uploaded on 12/19/2009 for the course CSE 306 taught by Professor Kifer,m during the Spring '08 term at SUNY Stony Brook.

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20090910 - Computer Architecture for Multiprogramming Goal:...

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