EE2301HW6F09Sol

# EE2301HW6F09Sol - Also list the hazards for Q and explain...

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1 Department of Electrical and Computer Engineering University of Minnesota EE2301 Fall 2009 Introduction to Digital System Design L. L. Kinney Problem Set VI Solutions Due Thurs Nov. 5, 2009 prior to the beginning or immediately after class. Please put your EE 0301 Discussion Section number (1, 2, 3, 4 or 5) ( not your EE 2301 Laboratory Section number) on your homework. 1. Problem 11.13 in the text. (a) AB Q 00 01 11 10 0 0 0 1 0 1 0 1 1 1 Q + = AB + QA + Q B (b) Q + = AB + Q(A + B) (c) A change from AB = 01 to 10 with Q initially 1 can result in Q changing to 0 if the lower inverter is very slow. (d) P = Q + A B equals Q in all stable states. (e) Q + = (A + Q)(B + Q)(A + B) = (AB + Q)(A + B)

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2 A B P Q (f) A change from AB = 01 to 10 with Q initially 0 can result in Q changing to 1 if the upper inverter is very slow. P = Q (A + B ) equals Q in all stable states. 2. Problem 11.14 in the text.
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Unformatted text preview: Also, list the hazards for Q + and explain what effects might result from the hazard. (b) Q + = A(B ′ + BQ) (a) AB Q 00 01 11 10 0 1 1 0 0 1 1 Bold and underlined entries are stable states. (c) This is a reset dominant latch where A ′ acts a reset; B ′ acts as a set. There is a static-1 hazard: ABQ (101) ↔ (111). During the transition (101) → (111), the lower mux may output a 0 and the latch can enter state 0 rather than state 1. 3. Problem 11.22 in the text. Clock J K Q Q (a) (b) 3 4. Problem 11.23 in the text. Clock Q D T (a) (b) 5. Problem 13.7 in the text. (a) Q 1 + = J 1 Q 1 ′ + K 1 ′ Q 1 = XQ 1 ′ + XQ 2 ′ Q 1 Q 2 + = J 2 Q 2 ′ + K 2 ′ Q 2 = XQ 2 ′ + XQ 1 Q 2 Z = X ′ Q 2 ′ + XQ 2 X Q 1 Q 2 0 1 00 00, 1 11, 0 01 00, 0 10, 1 11 00, 0 01, 1 10 00, 1 11, 0 (b) (c) Z = 00011...
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EE2301HW6F09Sol - Also list the hazards for Q and explain...

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