hw3 - ENGRD2300: Introduction to Digital Logic Fall 2009...

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ENGRD2300: Introduction to Digital Logic Fall 2009 Homework 3 Due Wednesday, Oct 7, at 1:25pm Problem 1. Show how to build the following logic function using one or more 74x138 or 74x139 binary decoders and NAND gates WXYZ (0,1,3,6,11,13,15) Problem 2. Wakerly Exercise 6.38 Problem 3. Draw a block diagram showing how you could construct a 1-bit, 16-1 mux using only 1-bit, 4-1 muxes Problem 4. Using a 1-bit, 8-1 mux with NO additional gates, implement the following 4-input Boolean expression. WXYZ (1,2,5,6,9,11,12,13,15) (It’s easy to do with 1 additional NOT gate, but you have to work a little harder to do it without any NOT gates.) Prob lem 5. Wakerly gives two ways to implement an XOR circuit with many inputs, a daisy-chain structure and a tree structure. Prove that these circuits are equivalent (at least for the 4 input case). 1
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ENGRD2300: Introduction to Digital Logic Fall 2009 2 Problem 6 Consider the following 2-4 binary decoder definition. G
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This note was uploaded on 12/25/2009 for the course ECE 2300 at Cornell University (Engineering School).

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hw3 - ENGRD2300: Introduction to Digital Logic Fall 2009...

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