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Unformatted text preview: (15) Problem 4: Using four registers, design a circuit that stores the previous four values seen at an 8-bit input D. The circuit should have a single 8-bit output that can be configured using two inputs s1 and s0 to output any one of the four registers. (15) Problem 5: Design a 4-bit register with 2 control inputs s1 and s0. 4 data inputs I3, I2, I1, I0, and 4 data outputs Q3, Q2, Q1 and Q0. When s1s0=00, the register clears itself to 0000. When s1s0=01, the register loads I3. ..I0. When s1s0=10, the register maintains its value. When s1s0=11, the register complements its value, so, for example, 0000 would become 1111, and 1010 would become 0101. (20) Problem 6: Design a counter according to the following transition diagram using minimum number of DFFs and MUXs. Do not use any logic gates other than inverters. 4 2 6...
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This note was uploaded on 12/29/2009 for the course ENG EC 311 taught by Professor Karpovsky during the Fall '09 term at BU.
- Fall '09