cs61_05win_mt

Cs61_05win_mt - Last name SID(last 4 digits First name login id Winter 2005 CS 061 Computer Org Assembly Language Mid-term exam Monday 2/7 total

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Last name: _____________________ First name: ___________________________ SID (last 4 digits): __________ login id: __________ CS 061 – Computer Org. & Assembly Language Winter - 2005 Mid-term exam – Monday 2/7 – total 100 points Time: 50 minutes You may have on your desks ONLY this exam, your personalized multiple choice answer sheet, a writing implement and an eraser, and your student ID. You may use a separate sheet(s) of scratch paper. Make good use of this – don’t write your answers in the assigned space until you are sure of them! WRITE CLEARLY IN THE SPACE PROVIDED. WARNING !!!: POINTS WILL BE DEDUCTED FOR MESSY & HARD-TO-READ HANDWRITING OR DIAGRAMS!!! Section I (questions 1 to 25) are to be answered on your multiple choice answer sheets; Section II (questions 1 to 3) on this exam booklet. Hand both in together. You will be required to show your student ID when you hand in your exam. Be sure to read each problem carefully and follow the directions. Section I 25 Section II Q.1 25 Section II Q.2 25 Section II Q.3 25 TOTAL 100
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Last name: _____________________ First name: ___________________________ Section I: Multiple choice – 1 point each 1. The Istruction Set Architecture of a microprocessor specifies (among other things): a. The microarchitecture of the processor. b. The address space available to the processor. c. The memory addressing modes to be used by instructions. d. The native data types of the microprocessor. e. All of the above f. Answers b, c and d 2. Assembly language instructions can be grouped into three categories. These are: a. Direct, indirect and relative b. Input, output and command c. Integer operations, floating point operations, and character operations d. Operations, data movement and control e. Load, store and arithmetic 3. The LC-3 ISA defines three memory addressing modes for instructions. These are: a. Direct, indirect and relative b. Input, output and command c. Integer operations, floating point operations, and character operations d. Operations, data movement and control e. Load, store and arithmetic 4. What is one major difference between a combinational logic circuit (such as a decoder) and a storage circuit (such as an RS latch)? a. The storage circuit requires a different class of gates b. The storage circuit requires a clock input c. The storage circuit uses feedback d. The storage circuit has no propagation delay 5. What is one purpose of the extra gates of a gated D-latch with respect to a simple R-S latch? a. to provide a feedback circuit in order to store the output. b.
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This note was uploaded on 01/06/2010 for the course CS it666 taught by Professor Tony during the Spring '06 term at 東京大学.

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Cs61_05win_mt - Last name SID(last 4 digits First name login id Winter 2005 CS 061 Computer Org Assembly Language Mid-term exam Monday 2/7 total

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