HW8 - D(x,y,z)= Σ(1,2,3,5,7(5p(a Tabulate the truth table...

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Homework #8 February 26, 2008 1 Homework #8 due March 10 at noon ECE 15a Winter 2008 (5p)1. Construct a 4-to-16 line decoder with five 2-to-4 line decoders with enable. (5p) 2. A combinational circuit is defined by the following three Boolean functions: F1=x’y’z’+xz F2=xy’z’+x’y F3=x’y’z+xy Design the circuit with a decoder and external gates. (5p) 3. Construct a 16x1 multiplexer with two 8x1 and one 2x1 multiplexers. Use block diagrams. (5p) 4. Implement the following Boolean function with a multiplexer: F(A,B,C,D) = Σ (0,1,3,4,8,9,15) (10p) 5. Implement a full adder with two 4x1 multiplexers. 6. A combinational circuit is defined by the following Boolean functions: A(x,y,z) = Σ (1,2,4,6) B(x,y,z) = Σ (0,1,6,7) C(x,y,z)= Σ (2,6)
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Unformatted text preview: D(x,y,z)= Σ (1,2,3,5,7) (5p) (a) Tabulate the truth table for an 8x4 ROM that implements these Boolean functions (10p) (b) Tabulate the PLA programming table for these functions. Minimize the number of product terms. (5p) (c) Implement this circuit using a PAL with 3 inputs, 4 outputs and 3-wide AND-OR structure. (10p) (d) Implement this circuit using CLBs of the type shown in fig. 9-33. Specify the functions realized by each function generator. 7. Implement a full adder using (5p) (a) only 2-1 muxes; (10p) (b) only 3-state buffers. (5p) 8. Show how to make a 8-to-3 priority encoder of fig.9-16 using two 4-to-2 priority encoders and any additional necessary gates. Homework #8 February 26, 2008 2...
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This note was uploaded on 01/13/2010 for the course ECE 15A taught by Professor M during the Winter '08 term at UCSB.

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HW8 - D(x,y,z)= Σ(1,2,3,5,7(5p(a Tabulate the truth table...

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