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15-Computer-Architecture - CS107 Spring 2007 Handout 15...

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CS107 Handout 15 Spring 2007 April 23, 2007 Computer Architecture: Take I Handout written by Julie Zelenski and Nick Parlante Computer architecture A simplified picture with the major features of a computer identified. The CPU is where all the work gets done, the memory is where all the code and data is stored. The path connecting the two is known as the "bus." CPU While memory stores the program and the data, the Central Processing Unit does all the work. The CPU has two parts— registers and an Arithmetic Logic Unit (ALU). A register is like the temporary memory in a calculator— each register can store a value that can be used in subsequent computations. Each register can usually hold one word. Sometimes there are separate specialized registers for holding specific types of data— floating point numbers, addresses, etc. The registers can be accessed much more quickly than memory, but the number of registers available is quite small compared to the size of memory. One of the specialized registers is the Program Counter, or PC, which holds the address of which instruction is currently being executed.
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2 The ALU is the part of the CPU that performs the actual computations such as addition and multiplication along with comparison and other logical operations. Most modern, high-performance CPUs actually contain several specialized logic units in addition to the ALU which allow them to work on several computations in parallel. However, that complexity is kept (literally) within the CPU. The abstraction of the CPU is that it executes its instructions one at a time, in the order presented in memory. For the balance of this handout, we will concentrate on the instruction set of a typical Reduced Instruction Set Computer (RISC) processor. RISC processors are distinguished by a relatively lean instruction set. It's turned out that you can get the best overall performance by giving your processor a simple instruction set, and then concentrating on making the processor's instructions/second performance as high as possible. So RISC processors don't have some of the fancier instructions or addressing modes featured by older Complex Instruction Set (CISC) designs. Thankfully, RISC has the added benefit
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